DATASHEET SC14SPNODE SF DECT Module with integrated Antenna and FLASH General description n n The SC14SPNODE SF is a member of the Cordless Module family with an integrated radio transceiver and baseband processor in a single package. It is designed for voice and data applications in the DECT frequency band. n RF range: 1870 MHz to 1930 MHz Receiver sensitivity < -93 dBm Transmit power • EU: 24 dBm: 1881MHz - 1897MHz SC14SPNODE SF JUL 1, 2014 V1.
1.0 Connection diagram. . . . . . . . . . . . . . . . . . . . . . . . 3 5.5 SAFETY REQUIREMENTS . . . . . . . . . . . . . . 26 1.1 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . 4 6.0 Package information . . . . . . . . . . . . . . . . . . . . . . 27 2.0 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 SOLDERING PROFILE . . . . . . . . . . . . . . . . . . 27 2.1 SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.
SC14SPNODE SF Connection diagram 79 GND 1 P0 2 RFP0 3 P0n 4 RFP0n TP1 78 GND 77 GND 76 GND 75 RF0 5 74 GND GND 6 73 RF1 VREFp 7 72 GND MICp/CIDINn 8 71 GND MICn/CIDOUT 9 70 GND MICh/LINEIN 10 69 PARADET/P3[4] VREFm 11 68 RINGOUT/RINGING/P3[5] LSRp/LINEOUT/AGND 12 67 RINGn/P3[6] LSRn/LINEOUT/AGND 13 66 RINGp/P3[7] GND 14 65 CIDINp/P3[2] ADC0/P3[3] 15 64 VBATIN ADC1/INT0/P1[0] 16 63 VBATIN SOCp 17 62 VBATSW SOCn 18 61 VDDOUT DC_SENSE
SC14SPNODE SF 1.1 PIN DESCRIPTION Table 1: Pin description Pin Module Pin name (Note 1) 1 GND - - - 2 P0 O 8 Hi-Z 3 RFP0 O 8 Hi-Z Control port for FAD. See 2.6 4 P0n O 8 Hi-Z Control port for FAD. See 2.6 5 RFP0n O 8 Hi-Z Control port for FAD. See 2.6 6 GND - - - Ground 7 VREFp O - I Positive microphone supply voltage 8 CIDINn I - I INPUT. Caller-id opamp negative input with switchable input protection enabled from start-up. INPUT. Positive microphone input.
Pin Module Pin name (Note 1) 22 CHARGE_CTRL O 1 O-0 ANALOG OUTPUT. Charge control pin. Supplied by internal VBAT if device is off else from AVD. Leave unconnected if not used. 23 CHARGE / P1[7] I - I-PD (270k fixed pulldown) INPUT. Charger connected indication and supply voltage for power management. Switches on the device if voltage > Vih_a3pad. Must be connected to charger via resistor R>(Vcharger_max-3 V)/10 mA (round to next largest value in range).
Pin Module Pin name (Note 1) In/ Out Iout Reset Drive State Description (mA) (Note 2) 37 P1[1]/ INT1/ LE 38 GND - - - 39 P2[6]/ WTF_IN IO 2 I-PU INPUT/OUTPUT with selectable pull up/down resistor. OUTPUT. Gen2DSP enable signal used to monitor DSP load 40 P0[7]/ SPI_DI/ PWM1 IO 8 I-PU INPUT/OUTPUT with selectable pull up/down resistor. INPUT. SPI data input. OUTPUT. Timer 0 PWM 1 output. 41 P0[6]/ SPI_DO IO 8 I-PU INPUT/OUTPUT with selectable pull up/down resistor. OUTPUT.
Pin 56 Module Pin name (Note 1) P2[3]/ SDA1/ In/ Out Iout Reset Drive State Description (mA) (Note 2) IO 8 I-PU INPUT/OUTPUT with selectable pull up/down resistor. INPUT / OUTPUT. ACCESS bus 1 data with programmable Pushpull or open drain. INPUT. PCM data input. OUTPUT. DIP port DP2. PCM_DI/ DP2 57 P2[2]/ PCM_CLK/ CLK100 I/O 8 I-PD INPUT/OUTPUT with selectable pull up/down resistor. INPUT/OUTPUT. PCM clock. OUTPUT. DIP 100 Hz output.
Pin Module Pin name (Note 1) 81-88 TP2 to TP9 In/ Out Iout Reset Drive State Description (mA) (Note 2) NC Must be left unconnected. See section 4.1 and Figure 15. Note 1: “NC” means: leave unconnected. Note 2: All digital inputs have Schmitt trigger inputs. After reset all I/Os are set to input and all pull-up or pull-down resistors are enabled unless oth- “GND” means internally connected to the module ground plane. Every GND pin should be connected to the main PCB.ground plane.
Introduction EMC Equipment Manufacturer’s Code ESD ElectroStatic Discharge FAD Fast Antenna Diversity FP Fixed Part GAP General Access Profile (DECT) IPEI International Portable Equipment Identity (ETSI EN 300 175-6) IWU Inter Working Unit (ETSI EN 300 175-1) MCU Micro Controller Unit MMI Man Machine Interface (keypad, LCD, buzzer, microphone, earpiece, speaker, headset) NSMD Non Solder Mask Defined (pad) NTP Normal Transmitted Power • ETSI certified OTP One Time Programmable • ETS
SC14SPNODE SF 2.4 BLOCK DIAGRAM Power supply XTAL 20.736 MHz PLL (165.888 MHz) SC14SPNODE Non Shared/ Cache/Trace RAM 16+4kByte CR16Cplus (82.
The SOC circuit is used to very accurately determine the amount of charge in rechargeable batteries as well as the discharge state of Alkaline batteries. This information is essential for the battery charging algorithm and necessary for battery status indication to the user. Detailed information can be found in AN-D-174 (see Reference [2]). Figure 5 shows one external antenna that is connected to RF1 of the SC14SPNODE SF. This configuration supports the FAD function.
Specifications All MIN/MAX specification limits are guaranteed by design, or production test, or statistical methods unless note 8 is added to the parameter description. Typical values are informative. Note 8: This parameter will not be tested in production. The MIN/MAX values are guaranteed by design and verified by characterization. 3.1 GENERAL Table 3: SC14SPNODE SF module ITEM CONDITIONS Dimensions lxwxh Weight UNIT 18.0 x 19.6 x 2.7 mm 1.
Table 5: Operating Conditions (Note 11) PARAMETER DESCRIPTION CONDITIONS Vbat Supply voltage on pin VBATIN Vdd_pa CLASSD supply voltage on pin VDDPA Vpon Vdig_bp Vdig Voltage on other digital pins Vana Voltage on analog pins Icharge Current through pin CHARGE Ipa Current through pin PAOUTp, PAOUTn Iout_vrefp Output current through pin VREFp TA Ambient temperature MIN MAX UNIT 2.1 3.45 V 2.1 3.45 V Voltage on pin PON 5.
Table 8: ULP_PORT specifications PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNITS Vil_ulp Logic 0 input level; pin ULP_PORT Vbat = 2.1 V to 3.45 V 0.2*Vbat V Vih_ulp Logic 1 input level; pin ULP_PORT Vbat = 2.1 V to 3.45 V Vol_ulp Logic 0 output level; pin ULP_PORT Iout = 1 mA, Vbat = 2.4 V Voh_ulp Logic 1 output level; pin ULP_PORT Iout = 1 mA, Vbat = 2.4 V Ipull_up_ulp Input current with pull up enabled; pin ULP_PORT Vin = GND 2.
Table 10: Microphone amplifier PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT Vmic_0dB_unt Untrimmed differential RMS input voltage between MICp and MICn (0 dBm0 reference level) (Note 8) 0 dBm0 on COUT (Note 17) MIC_GAIN[3:0] = 0, @ 1020 Hz; Tolerance: • 13% when untrimmed (BANDGAP_REG=8) (Note 16) 114 131 149 mV 75 150 SC14SPNODE SF 3.
PARAMETER DESCRIPTION Cload_vrefp Iout_vrefp Rout_vrefp MAX UNIT VREFp (parasitic) load capacitance 20 pF VREFp output current 1 mA VREFp CONDITIONS MIN TYP SC14SPNODE SF Table 13: VREFp load circuit Iout_vrefp Cload_vrefp VREFm Figure 8 VREFp load circuit Table 14: LSRp/LSRn outputs DESCRIPTION CONDITIONS MIN TYP MAX UNIT Vlsr_0dB_unt Untrimmed differential RMS output voltage between LSRp and LSRn in audio mode (0 dBm0 reference level) 0 dBm0 on CIN (Note 20), LSRATT[2:0] = 001,
PARAMETER DESCRIPTION CONDITIONS Cp1_Rl1_inf Load capacitance Cp1_Rl1_1k Load capacitance Rl1 Load resistance Cp2 Parallel load capacitance Cs2 Serial load capacitance Rl2 Load resistance MIN TYP MAX UNIT see Figure 9, RL1 = 30 pF see Figure 9, RL1 1 k 100 pF 30 pF 30 F 28 see Figure 10 600 LSRp SC14SPNODE SF Table 15: LSRp/LSRn load circuits LSRp RL2 RL1 Cp2 Cp1 Cs2 LSRn LSRn Figure 10 Load circuit B: Piezo loudspeaker Figure 9 Load circuit A: Dynamic lo
PARAMETER DESCRIPTION CONDITIONS C_VDDPA Decoupling capacitor on VDDPA Required when Class-D is used and guaranteed life time. (see Figure 11) MIN TYP 1 MAX UNIT F Cs_PAOUT Snubber capacitor (to reduce ringing at PAOUTp/n) Required when Class-D is used to prevent EMI and guaranteed life time. (see Figure 11) 1 nF Rs_PAOUT Snubber resistor (to reduce ringing at PAOUTp/n) Required when Class-D is used to prevent EMI and guaranteed life time.
Table 19: CHARGE_CTRL pin PARAMETER DESCRIPTION CONDITIONS MIN Voh_charge_ctrl Drive capability of pin CHARGE_CTRL sourcing 500 A 1.6 Vol_charge_ctrl TYP MAX UNIT V sinking 100 A 0.2 V MAX UNIT +100 mV Table 20: State of charge circuit (SoC) (Operating condition) DESCRIPTION CONDITIONS MIN Vsocp_socn Input voltage between SOCp and SOCn With the prescribed 0.
Table 22: Radio specifications PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT P_Rx Receiver sensitivity BER = 0.001; TA = 25 °C -93 -92 -89 dBm P_Rx_T Receiver sensitivity, full temperature range BER = 0.001; -40 °C TA 85 °C -94 -87 dBm IPL Intermodulation performance level (EN 301 406 section 4.5.7.6) TA = 25 °C; Pw = -80 dBm; f = 2 channels -35 NTP Normal transmitted power DECT: 250 mW 24 26 dBm J-DECT: 10 mW average per frame for each slot 23 24.5 dBm 20.
Table 24: Requirements for linear supply regulator PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT VBAT IN Voltage at VBAT SW Unloaded VB Loaded VB-V1-V2-V3 2.1 3 3.45 V V1 Settling time I = 50 mA 20 mV V2 Receive period I = 130 mA 100 mV V2 Transmit period I = 550 mA 200 mV V3 Drop during transmit 25 mV SC14SPNODE SF 3.11 RF POWER SUPPLY B DECT Module with integrated Antenna and FLASH Figure 14 RF power supply © 2012 Dialog Semiconductor B.V. 21 Jul 1, 2014 v1.
SC14SPNODE SF 3.12 RF CHANNEL FREQUENCIES Table 25: RF frequencies and channel numbers Frequency (MHz) DECT CH 1881.792 9 1883.520 8 1885.248 7 1886.976 6 1888.704 5 1890.432 4 1892.160 3 1893.888 2 1895.616 1 1897.344 0 J-DECT CH DECT6.0 CH 1 0 1899.072 10 1900.800 11 1902.528 12 4 1923.264 3 1924.992 2 1926.720 1 1928.448 0 DECT Module with integrated Antenna and FLASH 1921.
Design guidelines purposes. In order to avoid any interference or disturbance the area around these signal pins must be kept clear of any signal and/or GND. The recommended clearance is at least 1 mm as shown in Figure 15. 4.1 PCB DESIGN GUIDELINES • Because of the presence of the digital radio frequency burst with 100 Hz time division periods (TDD noise), supply ripple and RF radiation, special attention is needed for the power supply and ground PCB layout.
Place the module at the edge of the main-board as shown in Figure 16. If the module has to be placed away from the edge of the main-board, then avoid conducting areas in front of the antennas and make a cut-out in the main board underneath the antennas as shown in the figure. Keep a distance of at least 10 mm from the antenna elements to conducting objects and at least 5 mm to non-conducting objects. See Figure 18 and Figure 21 for the detailed package outline.
Notices to OEM • Increase the separation between the equipment and receiver The end product has to be certified again if it has been programmed with other software than Dialog standard software stack for portable part and/or uses one or two external antenna(s). • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. 5.
SC14SPNODE SF 5.3 PRECAUTIONS REGARDING UNINTENDED COUPLING Integration on the main board precautions shall be taken in order to avoid any kind of coupling from the main board to the RF part of the module. If there is any doubt about this, a radio short test should be performed. 5.4 END APPLICATION APPROVAL The module is intended to be used in an end application. Type approval concerning the end product, except for the module, should off cause be done.
SC14SPNODE SF 6.0 Package information 6.1 SOLDERING PROFILE The SC14SPNODE should be soldered using a standard reflow soldering profile and lead free solder paste as shown below. Adjustments to the profile may be necessary depending on process requirements. DECT Module with integrated Antenna and FLASH Figure 17 Reflow profile 6.
SC14SPNODE SF 6.3 COPPER PAD, SOLDER OPENING AND STENCIL For the stencil a thickness of 0.122 mm is recommended. Recommended copper pad, solder mask opening and stencil are shown below. DECT Module with integrated Antenna and FLASH Figure 18 Pad dimensions © 2012 Dialog Semiconductor B.V. 28 Jul 1, 2014 v1.
SC14SPNODE SF Figure 19 Copper pad, Solder mask opening and Stencil DECT Module with integrated Antenna and FLASH Figure 20 Solder stencil © 2012 Dialog Semiconductor B.V. 29 Jul 1, 2014 v1.
SC14SPNODE SF 6.4 MECHANICAL DIMENSIONS DECT Module with integrated Antenna and FLASH Figure 21 Package outline drawing © 2012 Dialog Semiconductor B.V. 30 Jul 1, 2014 v1.
SC14SPNODE SF 7.0 Revision history Jul1, 2014 v1.6: • Changed maximum RF output power for DECT 6.0 Apr 16, 2014 v1.5: • Added an explanation for RF1 on 2.6 Feb 11, 2014 v1.4: • Correct 6.3Copper pad, solder openinG and STENCIL28 Feb 4, 2014 v1.3: • Modified 6.3Copper pad, solder openinG and STENCIL28 Nov 8, 2013 v1.2: • Added section “5.2 INDUSTRY CANADA REQUIREMENTS REGARDING THE END PRODUCT AND THE END USER” Sept 12, 2013 v1.1: • Ordering code for tray version corrected.
Datasheet Status Product Status Definition Advance Information Formative or in Design This data sheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This data sheet contains preliminary data. Supplementary data will be published at a later date. Dialog Semiconductor reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
