DFZM-E82xx Data sheet DFZM-E82xx An IEEE 802.15.
DFZM-E82xx Contents 1. Features ............................................................................................................................................... 4 2. ZigBee Model No. Definition ............................................................................................................. 6 3. Architecture......................................................................................................................................... 7 3-1.Block Diagram .............
DFZM-E82xx Revision History Version 0.1 Date Reason of change Maker 2013/12/31 Initial release Monch 1. Add RF exposure warning statement including FCC 0.2 2014/06/27 statement. Monch 2. Modify 5.6 Radio Parameter for DFZM-E821x .
DFZM-E82xx DFZM-E82xx IEEE802.15.4 System-On-Chip ZigBee Module describes the DFZM-E82xx ZigBee module hardware specification. The EM3587 based modules provide cost effective, low power, and flexible platform to add ZigBee connectivity for embedded devices for a variety of applications, such as wireless sensors、energy and security T HIS DOCUMENT monitoring、building( or home ) automation and control .
DFZM-E82xx Flexible nested vectored interrupt controller. ► Interfaces: Internal antenna or external antenna options. Flexible ADC, UART/SPI/TWI serial communications, and general purpose timers. Up to 24 configurable general purpose I/Os. Single voltage operation: 2.1~3.6V ► Embedded RTC (Real Time Clock) can run directly from battery.
DFZM-E82xx 2. ZigBee Model No. Definition D F Z M - E 8 2 2 0 Data Sheet - DT 0 R Sheet 6 of 41 Free-lead E=Pb free R=RoHS N=NG L=Process with Lead Serial no. 0~9 then A~Z Customer code DT= Delta Define Antenna Version 0= External Antenna 1=PCB printed Antenna Power Version 1= High Power 2= Low Power Frequency 2= 2.
DFZM-E82xx 3. Architecture 3-1.
DFZM-E82xx 3-2.Block Diagram Description 3-2-1.Overview DFZM-E82xx module is a highly integrated ZigBee system-on-chip (SOC) that contains the following: The module includes Silicon Labs EM3587 SoC, which contains CPU- and memory-related, peripherals-related, clocks and power management-related in a single package. The module features an IEEE802.15.4-compliant radio transceiver with onboard 24 MHz crystal circuitries, RF, and certified antenna or external antenna options.
DFZM-E82xx developer to assist in tracking down and fixing issues. Figure 3.3 shows the EM357 ARM® Cortex-M3 memory map.
DFZM-E82xx 3-2-3.Clocks and Power Management The DFZM-E82xx integrates three oscillators: 12 MHz RC oscillator 24 MHz crystal oscillator 10 kHz RC oscillator Figure 3-4 shows a block diagram of the clocks in the DFZM-E82xx.
DFZM-E82xx The DFZM-E82xx’s power management system is designed to achieve the lowest deep sleep current consumption possible while still providing flexible wakeup sources, timer activity, and debugger operation. The DFZM-E82xx has four main sleep modes: Idle Sleep: Puts the CPU into an idle state where execution is suspended until any interrupt occurs. All power domains remain fully powered and nothing is reset. Deep Sleep 1: The primary deep sleep state.
DFZM-E82xx 3-2-4.Peripherals The DFZM-E82xx has 24 multipurpose GPIO pins, which may be individually configured as: General purpose output General purpose open-drain output Alternate output controlled by a peripheral device Alternate open-drain output controlled by a peripheral device Analog General purpose input General purpose input with pull-up or pull-down resistor The GPIO signal assignments are shown in Table 3-1.
DFZM-E82xx PC0 TRACEDATA1 PC1 ADC3 JRST, IRQD High TRACEDATA3 Standard 6 PC2 JTDO , SWO , TRACEDATA0 PC3 TRACECLK JTDI TRACECLK 7 PC4 SWDIO PC5 TX_ACTIVE Standard 5, 7 SWDIO , JTMS Standard 7 Standard Standard Notes: 1.Default signal assignment (not remapped). 2. Overrides during reset as an input with pull up. 3. Overrides after reset as an open-drain output. 4. Alternate signal assignment (remapped). 5. Overrides in JTAG mode as a input with pull up. 6.
DFZM-E82xx PB1 SC1MOSI Alternate SPI-Master Output SC1MISO Alternate SPI-Slave TWI-Master UART Output PB2 SC1MISO Input SC1MOSI Input SC1SDA Alternate SC1SCL Alternate Output (open-drain) Output (open-drain) TXD Alternate Output RXD Input PB3 SC1SCLK Alternate Output PB4 (not used) SC1SCLK Input SC1nSSEL Input (not used) (not used) SC1nCTS Input SC1nRTS Alternate Output Table 3-2: DFZM-E82xx SC1 GPIO Usage and Configuration PA0 SC2MOSI Alternate SPI-Master SPI-Slave TWI-Master Outp
DFZM-E82xx 4. Pin-out and Signal Description 4-1.
DFZM-E82xx 4-2.Module Pins Description Pins 1 Name Pin Type GND Ground PC5 I/O Description Ground Digital I/O(Not available for DFZM-E821X-DT0R) Logic-level control for external Tx/Rx switch .The EM358 baseband controls Tx active 2 TX_ACTIVE O and drives it high(VDD_PADS) when in Tx mode. Select alternate output function with GPIO_PCCFGH[7:4].
DFZM-E82xx Select alternate output function with GPIO_PBCFGH[3:0] TIM2C4 I Timer 2 channel 4 input, Enable remap with TIM2_OR[7] UART RTS handshake of Serial Controller 1 SC1nRTS O Either disable timer output in TIM2_CCER,or disable remap with TIM2_OR[7] Enable with SC1_UARTCFG[5], Select UART with SC1_MODE Select alternate output function with GPIO_PBCFGH[3:0] SC1nSSEL PA0 I I/O SPI slave select of Serial Controller 1 Enable slave with SC1_SPICFG[4], Select SPI with SC1_MODE Digital I/O Timer 2 cha
DFZM-E82xx Enable slave with SC2_SPICFG[4], Select SPI with SC2_MODE PA2 I/O Digital I/O Timer 2 channel 4 output TIM2C4 O Disable remap with TIM2_OR[7], Enable timer output in TIM2_CCER Select alternate output function with GPIO_PACFGL[11:8] TIM2C4 I Timer 2 channel 4 input, Disable remap with TIM2_OR[7] TWI clock of Serial Controller 2, Either disable timer output in TIM2_CCER, 9 SC2SCL I/O or enable remap with TIM2_OR[7], Select TWI with SC2_MODE Select alternate open-drain output function wi
DFZM-E82xx PA5 I/O ADC5 Analog Digital I/O ADC Input 5, Select analog function with GPIO_PACFGH[7:4] Data signal of Packet Trace Interface (PTI) PTI_DATA O Disable trace interface in ARM core, Enable PTI in Ember software Select alternate output function with GPIO_PACFGH[7:4] 12 nBOOTMODE I Activate FIB monitor instead of main program or bootloader when coming out of reset. Signal is active during and immediately after a reset on nRESET.
DFZM-E82xx Select UART with SC1_MODE Select alternate output function with GPIO_PBCFGL[7:4] Timer 2 channel 1 output TIM2C1 O Enable remap with TIM2_OR[4], Enable timer output in TIM2_CCER Select alternate output function with GPIO_PACFGL[7:4] TIM2C1 PB2 I I/O SC1MISO I SC1MOSI I Timer 2 channel 1 input, Disable remap with TIM2_OR[4] Digital I/O SPI master data in of Serial Controller 1 Select SPI with SC1_MODE, Select master with SC1_SPICR SPI slave data in of Serial Controller 1 Select SPI with S
DFZM-E82xx Synchronous CPU trace data bit 3 , Select 4-wire synchronous trace interface in ARM TRACEDATA0 O core , Enable trace interface in ARM core , Select alternate output function with GPIO_PCCFGL[11:8].
DFZM-E82xx ADC3 Analog ADC Input 3, Enable analog function with GPIO_PCCFGL[7:4] Synchronous CPU trace data bit 3 TRACEDATA3 O Select 1-, 2- or 4-wire synchronous trace interface in ARM core Enable trace interface in ARM core Select alternate output function with GPIO_PCCFGL[7:4] PC0 I/O Digital I/O, High current, Either enable with GPIO_DBGCFG[5] or enable Serial Wire mode (see JTMS description, Pin 35) and disable TRACEDATA1 JTAG reset input from debugger JRST I Selected when in JTAG mode (defa
DFZM-E82xx 28 GND Ground Ground 5. Electrical Characteristics 5-1.Absolute Maximum Rating Conditions beyond those cited in Table 5-1 may cause permanent damage to the DFZM-E72xx, and must be avoided. Parameter Minimum Maximum Unit Supply voltage(VCC) -0.3 3.6 V Storage temperature range -40 125 ºC Voltage on any digitai I/O -0.3 VCC+0.3 V Table 5-1: Absolute Maximum Ratings 5-2.Recommended Operating Conditions Parameter Minimum Maximum Unit Operating supply voltage(VCC) 2.1 3.
DFZM-E82xx 5-3.Power Consumption Test Conditions: TA=25 ºC, VCC=3.0V Parameter Test conditions Mim Typ Max Unit Deep Sleep Current Quiescent current, internal RC oscillator disabled Quiescent current, including internal RC oscillator Simulated deep sleep (debug mode) current With no debugger activity 1 uA 1.
DFZM-E82xx TX current max. power out (+3 dBm typical) 26.0 mA 43.5 mA 110 mA Radio transmitter, MAC, and baseband ARM® Cortex-M3 sleeping, CPU clock set to 12 MHz Total TX current ( = IRadio transmitter, MAC and baseband, CPU + IRAM, and flash memory) maximum power setting (+8 dBm); ARM® Cortex-M3 running at 24 MHz maximum power setting (+18.5 dBm); ARM® Cortex-M3 running at 24 MHz Table 5-3: Poewr Consumption 5-4.Digital I/O and nRESET Pin Specifications Test Conditions: TA=25 ºC, VCC=3.
DFZM-E82xx Parameter Test conditions Min Typ Max Unit IOLS 4 mA IOHH 8 mA IOLH 8 mA IOH + IOL 40 mA Max Unit (standard current pad) Output sink current (standard current pad) Output source current high current pad: PA6, PA7, PB6, PB7, PC0 Output sink current high current pad: PA6, PA7, PB6, PB7, PC0 Total output current (for I/O Pads) Table 5-4: Digital I/O Specifications Parameter Low Schmitt switching threshold High Schmitt switching threshold Test conditions Min Typ VSWIL, Schm
DFZM-E82xx Parameter Test conditions Min Typ Max Unit time and oscillator startup time Shutdown time going into deep sleep From last ARM® Cortex-M3 instruction to deep sleep mode 5 Table 5-6: Wake-up and Timing 5-6.Radio Parameters Test Conditions: TA=25 ºC, VCC=3.
DFZM-E82xx 5-7.ADC Parameters Test Conditions: TA=25 ºC, VCC=3.0V Parameter Min Typ Max Unit 1.17 1.2 1.23 V VREF output current 1 mA VREF load capacitance 10 nF 1.3 V VREF External VREF voltage range 1.1 1.
DFZM-E82xx 6. Package and Layout Guidelines 6-1.
DFZM-E82xx Figure 6-2: DFZM-E821x Module Dimensions (in mm) Data Sheet Sheet 30 of 41 Dec 31, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-E82xx Figure 6-3: DFZM-E822x Module Dimensions (in mm) Data Sheet Sheet 31 of 41 Dec 31, 2013 Proprietary Information and Specifications are Subject to Change
DFZM-E82xx 6-2.Layout Guidelines Keep out area for onboard antenna. All layers on the PCB must be clear. (i.e. No GND, Power trace/plane, traces.) Note: If guidelines are not followed, DFZM-E72xx range with onboard antenna will be compromised. Figure 6-4: DFZM-E82xx module onboard antenna keep-out layout guidelines (in mm) Notes: 1. All Dimensions are in mm. Tolerances shall be ±0.10 mm. 2. Absolutely no metal trace or ground layer underneath this area. 3.
DFZM-E82xx The onboard antenna keep out area, as shown in Figure 6-4, must be adhered to. In addition it is recommended to have clearance above and below the PCB trace antenna (Figure 6-4) for optimal range performance. Do not use a metallic or metalized plastic for the end product enclosure. Recommendation is to keep plastic enclosure clearance of 1cm from top and bottom of the DFZM-E82xx onboard antenna keep-out area, if possible. 5-mm (0.2 in) clearance shall be the minimum as shown in Figure 6-5.
DFZM-E82xx (° C ) Peak temp 250° c max 10 sec max 245° c±5° c for 10 ~30 sec 245 217 200 150 Room temp. Time 50 sec max 60-180 sec 60-150 sec Figure 6-6: Reflow temperature profile Note: 1. Perform adequate test in advance as the reflow temperature profile will vary accordingly to the conditions of the parts and boards, and the specifications of the reflow furnace. 2. Be careful about rapid temperature rise in preheat zone as it may cause excessive slumping of the solder paste. 3.
DFZM-E82xx 6-3.Recommended Stencil Aperture Note: The thickness of the stencil should be 0.15mm over this area.
DFZM-E82xx 7. Ordering Information DEVICE DESCRIPTION ORDERING NUMBER Extended range module using external antenna DFZM-E8210-DT0R Extended range module using onboard antenna DFZM-E8211-DT0R Low power module using external antenna DFZM-E8220-DT0R Low power module using onboard antenna DFZM-E8221-DT0R 8. Package 8-1.
DFZM-E82xx 6 :20 ZL Unreeling direction 2 06 5.
DFZM-E82xx 8-2.Reel dimension W1 ZL:200620003605.7 W0 規 格 品 名 瑋鋒編號 W0 W1 13" 100*44mm旋轉式圓盤 RUR-26-3-XL 45.0±0.5 50.0±1.
DFZM-E82xx 8-3.
DFZM-E82xx 8-4. RF exposure warning statement FCC Label Statement This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions: 1. This device may not cause harmful interference, and 2. This device must accept any interference received, including interference that may cause undesired operation. Federal Communications Commission (FCC) Statement 15.
DFZM-E82xx be co-located or operating in conjunction with any other antenna or transmitter.
