Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY EZ-BT Module CYBT-213066-02, CYBT-213067-02, EZ-BT Module General Description The CYBT-213066-02/CYBT-213067-02 is a dual-mode Bluetooth BR/EDR and Low Energy (BLE) wireless module solution. The CYBT-213066-02/CYBT-213067-02 includes an onboard crystal oscillator, passive components, and the Cypress CYW20819 silicon device.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Contents Overview ............................................................................ 4 Functional Block Diagram ........................................... 4 Module Description ...................................................... 5 Pad Connection Interface ................................................ 7 Recommended Host PCB Layout ................................... 8 Module Connections ......................................................
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Overview Functional Block Diagram Figure 1 illustrates the CYBT-213066-02 and CYBT-213067-02 functional block diagrams. Figure 1.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Module Description The CYBT-213066-02/CYBT-213067-02 module is a complete module designed to be soldered to the applications main board. Module Dimensions and Drawing Cypress reserves the right to select components from various vendors to achieve the Bluetooth module functionality. Such selections will still guarantee that all mechanical specifications and module certifications are maintained.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Figure 2. Module Mechanical Drawing Side View Top View (Seen from Top) Bottom View (Seen from Bottom) Note 1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on the recommended host PCB layout, see “Recommended Host PCB Layout” on page 8. Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Pad Connection Interface As shown in the bottom view of Figure 2 on page 6, the CYBT-213066-02/CYBT-213067-02 has 28 connections to a host board via solder pads (SP). Table 2 and Figure 3 detail the solder pad length, width, and pitch dimensions of the CYBT-213066-02/CYBT-213067-02 module. Table 2. Connection Description Name Connections Connection Type Pad Length Dimension Pad Width Dimension Pad Pitch SP 35 Solder Pad 1.02 mm 0.61 mm 0.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Recommended Host PCB Layout Figure 5, Figure 6, Figure 7, and Table 3 provide details that can be used for the recommended host PCB layout pattern for the CYBT-213066-02/CYBT-213067-02. Dimensions are in millimeters unless otherwise noted. Pad length of 1.27 mm (0.633 mm from center of the pad on either side) shown in Figure 7 is the minimum recommended host pad length. The host PCB layout pattern can be completed using either Figure 5, Figure 6, or Figure 7.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Table 3 provides the center location for each solder pad on the CYBT-213066-02/CYBT-213067-02. All dimensions are referenced to the center of the solder pad. Refer to Figure 7 for the location of each module solder pad. Table 3. Module Solder Pad Location Figure 7. Solder Pad Reference Location Solder Pad (Center of Pad) Location (X,Y) from Orign (mm) Dimension from Orign (mils) 1 (0.38, 4.85) (14.96, 190.94) 2 (0.38, 5.75) (14.96, 226.38) 3 (0.38, 6.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Module Connections Table 4 details the solder pad connection definitions and available functions for each connection pad. The GPIO connections available on the CYBT-213066-02/CYBT-213067-02 can be configured to any of the input or output functions listed in Table 5. Table 4 specifies any function that is required to be used on a specific solder pad, and also identifies SuperMux capable GPIOs that can be configured using the ModusToolbox device configurator.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 4. CYBT-213066-02/CYBT-213067-02 Solder Pad Connection Definitions (continued) Pad Pad Name Silicon Pin Name 35 GND GND XTALI/O ADC GPIO SuperMux Capable[2] Ground Table 5 details the available Input and Output functions that are configurable to any solder pad in Table 4 that are marked as SuperMux capable. Table 5.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Connections and Optional External Components Power Connections (VDD) The CYBT-213066-02/CYBT-213067-02 contains one power supply connection, VDD. VDD accepts a supply input of 1.71 V to 3.3 V. Table 12 provides this specification. The maximum power supply ripple for this power connection is 100 mV, as shown in Table 12.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Figure 8 illustrates the CYBT-213066-02/CYBT-213067-02 schematic. Figure 8. CYBT-213066-02/CYBT-213067-02 Schematic Diagram HOST_WAKE DEV_WAKE BT_RF H6 2.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Critical Components List Table 6 details the critical components used in the CYBT-213066-02/CYBT-213067-02 module. Table 6. Critical Component List Component Silicon Reference Designator U1 Description 62-pin QFN Bluetooth Silicon Device - CYW20819 Crystal Y1 24.000 MHz, 8PF Serial Flash (CYBT-213066-02) U2 512KB Antenna Design Table 7 details the PCB trace antenna used in the CYBT-213066-02/CYBT-213067-02 module. Table 7.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Bluetooth Baseband Core The Bluetooth Baseband Core (BBC) implements all time-critical functions required for high-performance Bluetooth operation. The BBC manages the buffering, segmentation, and routing of data for all connections. It prioritizes and schedules all RX/TX activities including adv, paging, scanning, and servicing of connections.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Power Management Unit Figure 9 shows the CYW20819 power management unit (PMU) block diagram. The CYW20819 includes an integrated buck regulator, a digital LDO for the digital core, and an RF LDO for the Radio. The PMU also includes a brownout detector which places the part in shutdown when input voltage is below a certain threshold. Figure 9. Default Usage Mode Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Integrated Radio Transceiver The CYBT-213066-02/CYBT-213067-02 has an integrated radio transceiver that has been designed to provide low power operation in the globally available 2.4 GHz unlicensed ISM band. Transmitter Path CYBT-213066-02/CYBT-213067-02 features a fully integrated transmitter. The baseband transmit data is GFSK modulated in the 2.4 GHz ISM band.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Microcontroller Unit The CYBT-213066-02/CYBT-213067-02 includes a Cortex-M4 processor with 1 MB of program ROM, 176 KB of RAM, and 256 KB of flash. The CM4 has a maximum speed of 96 MHz. The 256 KB of flash is supported by an 8 KB cache allowing direct code execution from flash at near maximum speed and low power consumption. The CM4 runs all the BT layers as well as application code.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 9. XTAL Oscillator Characteristics Parameter Output frequency Symbol Foscout Frequency tolerance Minimum Typical Maximum Unit – – 32.768 – kHz Over temperature and aging – – 250 ppm Pdrv For crystal selection – – 0.5 μW XTAL series resistance Rseries For crystal selection – – 70 kΩ XTAL shunt capacitance Cshunt For crystal selection – – 2.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 True Random Number Generator The CYBT-213066-02/CYBT-213067-02 includes a hardware TRNG (True Random Number Generator). Applications can access the random number generator via firmware APIs. Peripherals and Communication Interfaces I 2C The CYBT-213066-02/CYBT-213067-02 provides a 2-pin I2C master/slave interface to communicate with I2C compatible peripherals.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 ADC Port The CYBT-213066-02/CYBT-213067-02 includes a Σ-Δ ADC designed for audio and DC measurements. The ADC can measure the voltage on 13 (CYBT-213066-02) GPIOs (P0, P1, P8, P10, P12-P15, P17, P28, P29, P32, P37) and 15 (CYBT-213067-02) GPIOs (P0, P1, P8-P15, P17, P28, P29, P32, P37). When used for analog inputs, the GPIOs must be placed in digital input disable mode to disconnect the digital circuit from the pin and avoid leakage.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 PWM The CYBT-213066-02/CYBT-213067-02 has six internal PWMs, labeled PWM0-5. The PWM module consists of the following: ■ Each of the six PWM channels contains the following registers: ❐ 16-bit initial value register (read/write) ❐ 16-bit toggle register (read/write) ❐ 16-bit PWM counter value register (read) PWM configuration register shared among PWM0–5 (read/write).
PRELIMINARY CYBT-213066-02 CYBT-213067-02 I2S Interface The CYBT-213066-02/CYBT-213067-02 supports a single I2S digital audio port. with both master and slave modes. The I2S signals are: ■ I2S Clock: I2S SCK ■ I2S Word Select: I2S WS ■ I2S Data Out: I2S DO 2 ■I S 2 Data In: I2S DI I S SCK and I2S WS become outputs in master mode and inputs in slave mode, while I2S DO always stays as an output.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Electrical Characteristics The absolute maximum ratings in the following table indicate levels where permanent damage to the device can occur, even if these limits are exceeded for only a brief duration. Functional operation is not guaranteed under these conditions. Operation at absolute maximum conditions for extended periods can adversely affect long-term reliability of the device. . Table 10.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Current Consumption Table 14 provides the current consumption measurements taken at the input of LDOIN and VDDIO combined (LDOIN = VDDIO = 3.0 V). Table 14. Current Consumption Operational Mode HCI RX Conditions Typical 48 MHz with Pause 1.3 48 MHz without Pause 2.55 Continuous RX 5.9 TX Continuous TX - 0 dBm 5.8 PDS – 16.5 ePDS All RAM retained 8.7 HID-Off (SDS) 32 kHz XTAL on 1.75 Unit mA μA Silicon Core Buck Regulator Table 15.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Digital LDO Table 16. Digital LDO Parameter Input Supply, DIGLDO_VDDIN Condition Min must be met for correct operation Range Output Voltage, DIGLDO_VDDOUT Step Min Typ Max VOUT + 20 mV 1.26 1.4 0.9 1.2 1.275 – 25 – Unit V mV Accuracy after trimming –2 – +2 % Dropout Voltage At max load current – – 20 mV Output Current DC Load 0.075 40 60 mA Quiescent Current At T ≤ 85 °C, VIN = 1.4 V – – 40 μA 1.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 17. RF LDO (continued) Parameter Conditions PSRR COUT = 2.2 μF, 1.235 V ≤ VIN ≤ 1.4 V, VOUT = 1.2 V, IOUT = 20 mA f = 1 kHz f = 100 kHz Noise COUT = 2.2 μF, VIN = 1.235 V, VOUT = 1.2 V, IOUT = 20 mA f = 30 kHz f = 100 kHz Min. Typ. Max. Unit 25 13 – – dB dB – – 80 70 nV√Hz nV√Hz Digital I/O Characteristics Table 18.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 19. Electrical Characteristics (continued) Parameter Conversion rate Signal bandwidth Input impedance Startup time Symbol – – RIN – Conditions/Comments Min. Typ. Max.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Chipset RF Specifications Table 20, Table 21, Table 22, and Table 23 apply to single-ended industrial temperatures. Unused inputs are left open. Table 20. BR/EDR - Receiver RF Specifications Parameter Mode and Conditions Min Typ Max Unit 2402 – 2480 MHz – –91.5[6] – dBm EDR 2M – –94.5 – EDR 3M – –88 – –20 – – Receiver Section Frequency range – GFSK, BR GFSK 0.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 21. BR/EDR - Transmitter RF Specifications Parameter Min Typ Max Unit 2402 – 2480 MHz Class 2: BR TX power – 5.0 – Class 2: EDR 2M and 3M TX power – 0 – 20 dB bandwidth – 930 1000 |M – N| = 2 – – –20 |M – N| ≥ 3 [9] – – –40 – – –36.0 Transmitter Section Frequency range dBm kHz Adjacent Channel Power dBm Out-of-Band Spurious Emission 30 MHz to 1 GHz 1 GHz to 12.75 GHz – – –30.0 1.8 GHz to 1.9 GHz – – –47.0 5.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 23. BLE2 RF Specifications Parameter Conditions [12] Minimum Typical Maximum RX sensitivity – – –90.5 – TX power – – 5.0 – Unit dBm Timing and AC Characteristics In this section, use the numbers listed in the Reference column of each table to interpret the following timing diagrams. UART Timing Table 24. UART Timing Specifications Reference Characteristics Min. Typ. Max. Unit 1 Delay time, UART_CTS_N low to UART_TXD valid. – – 1.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY SPI Timing The SPI interface can be clocked up to 24 MHz. Table 25 and Figure 14 show the timing requirements when operating in SPI Mode 0 and 2. Table 25. SPI Mode 0 and 2 Reference Characteristics Min. Max. 1 Time from master assert SPI_CSN to first clock edge 45 – 2 Setup time for MOSI data lines 6 ¾ SCK 3 Idle time between subsequent SPI transactions 1 SCK – Unit ns Figure 14. SPI Timing, Mode 0 and 2 Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Table 26 and Figure 15 show the timing requirements when operating in SPI Mode 1 and 3. Table 26. SPI Mode 1 and 3 Reference Characteristics Min. Max. 1 Time from master assert SPI_CSN to first clock edge 45 – 2 Setup time for MOSI data lines 6 ¾ SCK 3 Idle time between subsequent SPI transactions 1 SCK – Unit ns Figure 15. SPI Timing, Mode 1 and 3 Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY I2C Compatible Interface Timing The specifications in Table 26 references Figure . Table 27.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY I2S Interface Timing I2S timing is shown below in Table 28, Figure 17, and Figure 18. Table 28. Timing for I2S Transmitters and Receivers Transmitter Lower LImit Clock Period T Receiver Upper Limit Lower Limit Upper Limit Notes Min Max Min Max Min Max Min Max Ttr – – – Tr – – – [15] Master Mode: Clock generated by transmitter or receiver HIGH tHC 0.35Ttr – – – 0.35Ttr – – – [16] LOWtLC 0.35Ttr – – – 0.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Figure 17. I2S Transmitter Timing Figure 18. I2S Receiver Timing Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Environmental Specifications Environmental Compliance This Cypress BLE module is produced in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen-Free (HF) directives. The Cypress module and components used to produce this module are RoHS and HF compliant.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Regulatory Information FCC FCC NOTICE: The device CYBT-213066-02/CYBT-213067-02 complies with Part 15 of the FCC Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 ISED Innovation, Science and Economic Development (ISED) Canada Certification CYBT-213066-02/CYBT-213067-02 is licensed to meet the regulatory requirements of Innovation, Science and Economic Development (ISED) Canada. License: IC: 7922A-3066 Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 European Declaration of Conformity Hereby, Cypress Semiconductor declares that the Bluetooth module CYBT-213066-02/CYBT-213067-02 complies with the essential requirements and other relevant provisions of Directive 2014.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Packaging Table 30. Solder Reflow Peak Temperature Module Part Number Package CYBT-213066-02 35-pad SMT Maximum Peak Temperature Maximum Time at Peak Temperature No. of Cycles 260 °C 30 seconds 2 CYBT-213067-02 Table 31. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2 Module Part Number Package MSL CYBT-213066-02 35-pad SMT MSL 3 CYBT-213067-02 The CYBT-213066-02/CYBT-213067-02 is offered in tape and reel packaging.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Figure 21 details reel dimensions used for the CYBT-213066-02/CYBT-213067-02. Figure 21. Reel Dimensions The CYBT-213066-02/CYBT-213067-02 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The center-of-mass for the CYBT-213066-02/CYBT-213067-02 is detailed in Figure 22. Figure 22. CYBT-213066-02/CYBT-213067-02 Center of Mass Top View (Seen from Top) Document Number: 002-30628 Rev.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Ordering Information Table 32 lists the CYBT-213066-02/CYBT-213067-02 part number and features. Table 32 also lists the target program for the respective module ordering codes. Table 33 lists the reel shipment quantities for the CYBT-213066-02/CYBT-213067-02. Table 32.
CYBT-213066-02 CYBT-213067-02 PRELIMINARY Acronyms Document Conventions Table 34. Acronyms Used in this Document Units of Measure Acronym BLE Description Table 35.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Document History Page Document Title: CYBT-213066-02, CYBT-213067-02, EZ-BT Module Document Number: 002-30628 Revision ECN Submission Date ** 6900687 06/18/2020 Document Number: 002-30628 Rev. ** Description of Change Initial release.
PRELIMINARY CYBT-213066-02 CYBT-213067-02 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products Arm® Cortex® Microcontrollers Automotive cypress.com/arm cypress.com/automotive Clocks & Buffers Interface cypress.com/clocks cypress.