Cinterion® PLS63-X Hardware Interface Overview Version: DocId: 00.860 PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 2 of 61 2 Document Name: Cinterion® PLS63-X Hardware Interface Overview Version: 00.860 Date: 2021-02-22 DocId: PLS63-X_HIO_v00.860 Status Confidential / Preliminary GENERAL NOTE THE USE OF THE PRODUCT INCLUDING THE SOFTWARE AND DOCUMENTATION (THE "PRODUCT") IS SUBJECT TO THE RELEASE NOTE PROVIDED TOGETHER WITH PRODUCT. IN ANY EVENT THE PROVISIONS OF THE RELEASE NOTE SHALL PREVAIL.
Cinterion® PLS63-X Hardware Interface Overview Page 3 of 61 Contents 61 Contents 1 Introduction ................................................................................................................. 7 1.1 Product Variants ................................................................................................ 7 1.2 Key Features at a Glance .................................................................................. 7 1.3 PLS63-X System Overview...................................
Cinterion® PLS63-X Hardware Interface Overview Page 4 of 61 Contents 61 7 Appendix.................................................................................................................... 47 7.1 List of Parts and Accessories........................................................................... 47 t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 5 of 61 Tables Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: t Signals of the SIM interface (SMT application interface) ............................... GPIO lines and possible alternative assignment............................................ Overview of PCM pin functions ...................................................................... Overview of I2S pin functions .........
Cinterion® PLS63-X Hardware Interface Overview Page 6 of 61 Figures Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: t PLS63-X system overview ............................................................................. USB circuit ......................................
Cinterion® PLS63-X Hardware Interface Overview Page 7 of 61 1 Introduction 11 1 Introduction This document1 describes the hardware of the Cinterion® PLS63-X module. It helps you quickly retrieve interface specifications, electrical and mechanical details and information on the requirements to be considered for integrating further components. 1.1 Product Variants This document applies to the following Thales module variants: • Cinterion®PLS63-X Module 1.
Cinterion® PLS63-X Hardware Interface Overview Page 8 of 61 1.2 Key Features at a Glance 11 Feature Implementation Operating temperature (board temperature) Normal operation: -30°C to +85°C Extended operation: -40°C to -30°C, +85°C to +90°C Physical Dimensions: 33mm x 29mm x 2.5mm Weight: approx. 4.8g RoHS All hardware components fully compliant with EU RoHS Directive LTE features 3GPP Release 10 UE CAT 1 for PLS63 (DL 10Mbps, UL 5Mbps) HSPA feature 3GPP Release 7 UE CAT.
Cinterion® PLS63-X Hardware Interface Overview Page 9 of 61 1.2 Key Features at a Glance 11 Feature Implementation SIM Application Toolkit Default (Network) bearer support for BIP Firmware update Generic update from host application over USB modem Interfaces Module interface Surface mount device with solderable connection pads (SMT application interface). Land grid array (LGA) technology ensures high solder joint reliability and allows the use of an optional module mounting socket.
Cinterion® PLS63-X Hardware Interface Overview Page 10 of 61 1.2 Key Features at a Glance 11 Feature Implementation Evaluation kit LGA DevKit LGA DevKit designed to test Thales LGA modules. Evaluation module PLS63-X module soldered onto a dedicated PCB that can be connected to an adapter in order to be mounted onto the DSB75 or DSB mini. DSB-mini DSB-mini Development Support Board designed to test and type approve. It is the cost optimized development board alternative to DSB75.
Cinterion® PLS63-X Hardware Interface Overview Page 11 of 61 1.3 PLS63-X System Overview 11 1.
Cinterion® PLS63-X Hardware Interface Overview Page 12 of 61 2 Interface Characteristics 31 2 Interface Characteristics PLS63-X is equipped with an SMT application interface that connects to the external application. The SMT application interface incorporates the various application interfaces as well as the RF antenna interface. 2.1 Application Interface 2.1.1 USB Interface PLS63-X supports a USB 2.0 High Speed (480Mbit/s) device interface that is Full Speed (12Mbit/s) compliant.
Cinterion® PLS63-X Hardware Interface Overview Page 13 of 61 2.1 Application Interface 31 While a USB connection is active, the module will never switch to SLEEP mode. Only if the USB interface is in Suspend mode, the module is able to switch to SLEEP mode. 2.1.2 Serial Interface ASC0 PLS63-X offers an 8-wire unbalanced, asynchronous modem interface ASC0 conforming to ITU-T V.24 protocol DCE signaling. The electrical characteristics do not comply with ITU-T V.28.
Cinterion® PLS63-X Hardware Interface Overview Page 14 of 61 2.1 Application Interface 31 Configuration is done by AT command (see [1]). The configuration is non-volatile and becomes active after a module restart. Notes: No data must be sent over the ASC0 interface before the interface is active and ready to receive data (see Section 3.1.1). 2.1.
Cinterion® PLS63-X Hardware Interface Overview Page 15 of 61 2.1 Application Interface 31 2.1.4 UICC/SIM/USIM Interface PLS63-X has two UICC/SIM/USIM interfaces (includes eSIM interface) compatible with the 3GPP 31.102 and ETSI 102 221. These are wired to the host interface in order to be connected to an external SIM card holder. Five pads on the SMT application interface are reserved for each of the two SIM interfaces. The UICC/SIM/USIM interface supports 3V and 1.8V SIM cards.
Cinterion® PLS63-X Hardware Interface Overview Page 16 of 61 2.1 Application Interface 31 Module 1st SIM interface SIM1 2nd SIM interface SIM2 Figure 5: Module’s two UICC/SIM/USIM interfaces . Figure 6: UICC/SIM/USIM interfaces connected The total cable length between the SMT application interface pads on PLS63-X and the pads of the external SIM card holder must not exceed 100mm in order to meet the specifications of 3GPP TS 51.010-1 and to satisfy the requirements of EMC compliance.
Cinterion® PLS63-X Hardware Interface Overview Page 17 of 61 2.1 Application Interface 31 2.1.4.1 SIM_SWITCH Line As an alternative to connecting the module’s two SIM interfaces and switching between these interfaces by means of AT command, it is possible to connect the first of the module’s SIM interfaces via an external SIM switch that in turn provides access to a further SIM interface.
Cinterion® PLS63-X Hardware Interface Overview Page 18 of 61 2.1 Application Interface 31 2.1.5 GPIO Interface The following table shows the configuration variants for the GPIO pads. All variants are mutually exclusive, i.e. a pad configured for instance as Status LED is locked for alternative usage.
Cinterion® PLS63-X Hardware Interface Overview Page 19 of 61 2.1 Application Interface 31 to 8kHz in a narrowband call. Therefore, the PCM sample rate is independent of the audio bandwidth of the call. The PCM interface has the following characteristics: • Master mode • Long frame synchronization • 16kHz/8kHz sample rate • 512 kHz bit clock at 16kHz sample rate • 256 kHz bit clock at 8kHz sample rate Table 3 lists the available PCM interface signals.
Cinterion® PLS63-X Hardware Interface Overview Page 20 of 61 2.
Cinterion® PLS63-X Hardware Interface Overview Page 21 of 61 2.1 Application Interface 31 2.1.7.2 Power Indication The power indication signal PWR_IND notifies the on/off state of the module. High state of PWR_IND indicates that the module is switched off. The state of PWR_IND immediately changes to low when IGT is pulled low. For state detection an external pull-up resistor is required. Module Power supply On/Off (open drain driver) SMT interface e.g.
Cinterion® PLS63-X Hardware Interface Overview Page 22 of 61 2.2 RF Antenna Interface 31 2.2 RF Antenna Interface The PLS63-X GSM/UMTS/LTE antenna interface comprises a GSM/UMTS/LTE main antenna as well as a UMTS/LTE Rx diversity antenna to improve signal reliability and quality1. The RF interface has an impedance of 50Ω. PLS63-X is capable of sustaining a total mismatch at the antenna line without any damage, even when transmitting at maximum RF power.
Cinterion® PLS63-X Hardware Interface Overview Page 23 of 61 2.2 RF Antenna Interface 31 2.2.1 Antenna Installation The antenna is connected by soldering the antenna pads (ANT_MAIN, ANT_DRX and ANT_GNSS) and their neighboring ground pads directly to the application’s PCB.
Cinterion® PLS63-X Hardware Interface Overview Page 24 of 61 2.2 RF Antenna Interface 31 2.2.2 RF Line Routing Design 2.2.2.1 Line Arrangement Examples Several dedicated tools are available to calculate line arrangements for specific applications and PCB materials - for example from http://www.polarinstruments.com/ (commercial software) or from http:www.awr.com/awr-software/options/tx-line/ (free software).
Cinterion® PLS63-X Hardware Interface Overview Page 25 of 61 2.2 RF Antenna Interface 31 Micro-Stripline This section gives two line arrangement examples for micro-stripline. • Micro-Stripline on 1.0mm Standard FR4 2-Layer PCB The following two figures show examples with different values for D1 (ground strip separation). Application board Ground line Antenna line Ground line Figure 13: Micro-Stripline on 1.0mm standard FR4 2-layer PCB - example 1 t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 26 of 61 2.2 RF Antenna Interface 31 Application board Ground line Antenna line Ground line Figure 14: Micro-Stripline on 1.0mm Standard FR4 PCB - example 2 t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 27 of 61 2.2 RF Antenna Interface 31 • Micro-Stripline on 1.5mm Standard FR4 2-Layer PCB The following two figures show examples with different values for D1 (ground strip separation). Application board Ground line Antenna line Ground line Figure 15: Micro-Stripline on 1.5mm Standard FR4 PCB - example 1 t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 28 of 61 2.2 RF Antenna Interface 31 Application board Ground line Antenna line Ground line Figure 16: Micro-Stripline on 1.5mm Standard FR4 PCB - example 2 t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 29 of 61 2.2 RF Antenna Interface 31 2.2.2.2 Routing Example Interface to RF Connector Figure 17 shows a sample connection of a module‘s antenna pad at the bottom layer of the module PCB with an application PCB‘s coaxial antenna connector. Line impedance depends on line width, but also on other PCB characteristics like dielectric, height and layer gap. The sample stripline width of 0.
Cinterion® PLS63-X Hardware Interface Overview Page 30 of 61 2.3 GNSS Antenna Interface 31 2.3 GNSS Antenna Interface In addition to the RF antenna interface PLS63-X also has a GNSS antenna interface. The GNSS pad’s shape is the same as for the RF antenna interface (see Section 2.2.1). It is possible to connect active or passive GNSS antennas. In either case they must have 50 impedance. The simultaneous operation of GSM/UMTS/LTE and GNSS is implemented.
Cinterion® PLS63-X Hardware Interface Overview Page 31 of 61 2.3 GNSS Antenna Interface 31 Figure 20 shows a sample circuit realizing ESD protection for a passive GNSS antenna. Connecting the input ANT_GNSS_DC to GND prevents ESD from coupling into the module. Module SMT interface VGNSS 100nF Not used ANT_GNSS_DC 22p+ 100n Passive GNSS antenna (Optional) 0R ESD protection 10nH ANT_GNSS To GNSS receiver Figure 20: ESD protection for passive GNSS antenna 2.3.
Cinterion® PLS63-X Hardware Interface Overview Page 32 of 61 3 Operating Characteristics 32 3 Operating Characteristics 3.1 Power Supply PLS63-X needs to be connected to a power supply at the SMT application interface - 4 lines BATT+, and GND. There are two separate voltage domains for BATT+: • BATT+BB with two lines for the general power management. • BATT+RF with two lines for the RF.
Cinterion® PLS63-X Hardware Interface Overview Page 33 of 61 4 Mechanical Dimensions, Mounting and Packaging 36 4 Mechanical Dimensions, Mounting and Packaging 4.1 Mechanical Dimensions of PLS63-X Figure 22 shows the top and bottom view of PLS63-X and provides an overview of the board's mechanical dimensions. For further details see Figure 22. t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 34 of 61 4.1 Mechanical Dimensions of PLS63-X 36 Top view Bottom View Figure 22: PLS63-X– top and bottom view for X variant t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 35 of 61 4.1 Mechanical Dimensions of PLS63-X 36 Figure 23: Dimensions of (all dimensions in mm) Figure 24: Dimensions of PLS63-X (all dimensions in mm) t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 36 of 61 4.1 Mechanical Dimensions of PLS63-X 36 Figure 25: Dimensions of PLS63-X (keepout area recommended) t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 37 of 61 5 Regulatory and Type Approval Information 41 5 Regulatory and Type Approval Information 5.1 Directives and Standards PLS63-X is designed to comply with the directives and standards listed below.
Cinterion® PLS63-X Hardware Interface Overview Page 38 of 61 5.2 SAR requirements specific to portable mobiles 41 5.2 SAR requirements specific to portable mobiles Mobile phones, PDAs or other portable transmitters and receivers incorporating a GSM/UMTS module must be in accordance with the guidelines for human exposure to radio frequency energy.
Cinterion® PLS63-X Hardware Interface Overview Page 39 of 61 5.3 Reference Equipment for Type Approval 41 5.
Cinterion® PLS63-X Hardware Interface Overview Page 40 of 61 5.4 Compliance with FCC/IC/ISED Rules and Regulations 41 5.4 Compliance with FCC/IC/ISED Rules and Regulations The Equipment Authorization Certification for the Thales reference application described in Section 5.
Cinterion® PLS63-X Hardware Interface Overview Page 41 of 61 5.4 Compliance with FCC/IC/ISED Rules and Regulations 41 device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
Cinterion® PLS63-X Hardware Interface Overview Page 43 of 61 6 Document Information 47 6 Document Information 6.1 Revision History New document: "Cinterion® PLS63-X Hardware Interface Overview" Version 00.860 Chapter What is new -- Initial document setup. 6.2 [1] [2] [3] [4] [5] Related Documents PLS63-X AT Command Set PLS63-X Release Note Universal Serial Bus Specification Revision 2.
Cinterion® PLS63-X Hardware Interface Overview Page 44 of 61 6.3 Terms and Abbreviations 47 Abbreviation Description DCE Data Communication Equipment (typically modems, e.g.
Cinterion® PLS63-X Hardware Interface Overview Page 45 of 61 6.
Cinterion® PLS63-X Hardware Interface Overview Page 46 of 61 6.3 Terms and Abbreviations 47 Abbreviation Description UART Universal asynchronous receiver-transmitter URC Unsolicited Result Code USSD Unstructured Supplementary Service Data VSWR Voltage Standing Wave Ratio t PLS63-X_HIO_v00.
Cinterion® PLS63-X Hardware Interface Overview Page 47 of 61 6.4 Safety Precaution Notes 47 6.4 Safety Precaution Notes The following safety precautions must be observed during all phases of the operation, usage, service or repair of any cellular terminal or mobile incorporating PLS63-X. Manufacturers of the cellular terminal are advised to convey the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product.
Cinterion® PLS63-X Hardware Interface Overview Page 48 of 61 7 Appendix 49 7 Appendix 7.
Cinterion® PLS63-X Hardware Interface Overview Page 49 of 61 7.1 List of Parts and Accessories 49 Table 12: Molex sales contacts (subject to change) Molex For further information please click: http://www.molex.com Molex Deutschland GmbH Otto-Hahn-Str. 1b 69190 Walldorf Germany Phone: +49-6227-3091-0 Fax: +49-6227-3091-8100 Email: mxgermany@molex.com American Headquarters Lisle, Illinois 60532 U.S.A.
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