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EC21 Hardware Design

LTE Module Series

Rev. EC21_Hardware_Design_V1.5

Date: 2017-03-05

Status: Released

www.quectel.com

Summary of content (102 pages)

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EC21 Hardware Design LTE Module Series Rev. EC21_Hardware_Design_V1.5 Date: 2017-03-05 Status: Released www.quectel.
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LTE Module Series EC21 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://quectel.com/support/sales.
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LTE Module Series EC21 Hardware Design About the Document History Revision Date Author Description 1.0 2016-04-15 Yeoman CHEN Initial Yeoman CHEN/ Frank WANG/ Lyndon LIU 1. Updated frequency bands in Table 1. 2. Updated transmitting power, supported maximum baud rate of main UART, supported internet protocols, supported USB drivers of USB interface, and temperature range in Table 2. 3. Updated timing of turning on module in Figure 12. 4. Updated timing of turning off module in Figure 13. 5.
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LTE Module Series EC21 Hardware Design Table 48. 1.4 2017-03-01 Geely YANG Deleted the LTE band TDD B41 of EC21-CT 1. 2. 3. 4. 5. 6. 7. 8. 9. 1.5 2018-03-05 Annice ZHANG/ Lyndon LIU/ Frank WANG 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. EC21_Hardware_Design Updated functional diagram in Figure 1. Updated frequency bands in Table 1. Updated UMTS and GSM features in Table 2. Updated description of pin 40/136/137/138. Updated PWRKEY pulled down time to 500ms in chapter 3.7.
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LTE Module Series EC21 Hardware Design Contents About the Document.................................................................................................................................................2 Contents....................................................................................................................................................................... 4 Table Index.............................................................................................................
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LTE Module Series EC21 Hardware Design 3.12. SD Card Interface....................................................................................................................................48 3.13. ADC Interfaces.........................................................................................................................................51 3.14. Network Status Indication...................................................................................................................... 51 3.
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LTE Module Series EC21 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes............................................................................
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LTE Module Series EC21 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF EC21 SERIES MODULE................................................................................ 13 TABLE 2: KEY FEATURES OF EC21 MODULE..........................................................................................................14 TABLE 3: I/O PARAMETERS DEFINITION................................................................................................................... 19 TABLE 4: PIN DESCRIPTION........
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LTE Module Series EC21 Hardware Design TABLE 42: RF OUTPUT POWER................................................................................................................................... 77 TABLE 43: EC21-E CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 77 TABLE 44: EC21-A CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 78 TABLE 45: EC21-V CONDUCTED RF RECEIVING SENSITIVITY..
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LTE Module Series EC21 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM............................................................................................................................ 17 FIGURE 2: PIN ASSIGNMENT (TOP VIEW).................................................................................错误！未定义书签。 FIGURE 3: SLEEP MODE APPLICATION VIA UART.................................................................................................
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LTE Module Series EC21 Hardware Design FIGURE 38: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM)...................................................... 66 FIGURE 39: MECHANICALS OF U.FL-LP CONNECTORS...................................................................................... 67 FIGURE 40: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM)................................................................... 67 FIGURE 41: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE).....................
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LTE Module Series EC21 Hardware Design 1 Introduction This document defines the EC21 module and describes its air interface and hardware interface which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details, as well as other related information of EC21 module. Associated with application note and user guide, customers can use EC21 module to design and set up mobile applications easily.
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LTE Module Series EC21 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating EC21 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
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LTE Module Series EC21 Hardware Design 2 Product Concept 2.1. General Description EC21 is a series of LTE-FDD/LTE-TDD/WCDMA/GSM wireless communication module with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It also provides GNSS1) and voice functionality2) for customers’ specific applications. EC21 contains nine variants: EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT, EC21-AUV, EC21-J, EC21-KL and EC20-CEL.
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LTE Module Series EC21 Hardware Design NOTES 1. 2. 3. 4. GNSS function is optional. EC21 series module (EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT, EC21-AUV, EC21-J, EC21-KL and EC20-CEL) contains Telematics version and Data-only version. Telematics version supports voice and data functions, while Data-only version only supports data function. 3) B2 band on EC21-AU module does not support Rx-diversity. Y = Supported. N = Not supported. 1) 2) With a compact profile of 29.0mm × 32.0mm × 2.
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LTE Module Series EC21 Hardware Design LTE-TDD: Max 8.96Mbps (DL)/3.1Mbps (UL) UMTS Features Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA Support QPSK, 16-QAM and 64-QAM modulation DC-HSDPA: Max 42Mbps (DL) HSUPA: Max 5.76Mbps (UL) WCDMA: Max 384Kbps (DL)/384Kbps (UL) GSM Features GPRS: Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107Kbps (DL)/85.
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LTE Module Series EC21 Hardware Design UART Interface 7/8/8.1/10, Windows CE 5.0/6.0/7.0*, Linux 2.6/3.x/4.1, Android 4.x/5.x/6.x/7.x Main UART: Used for AT command communication and data transmission Baud rates reach up to 921600bps, 115200bps by default Support RTS and CTS hardware flow control Debug UART: Used for Linux console and log output 115200bps baud rate SD Card Interface Support SD 3.
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LTE Module Series EC21 Hardware Design 2.3. Functional Diagram The following figure shows a block diagram of EC21 and illustrates the major functional parts.      Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces Figure 1: Functional Diagram 2.4. Evaluation Board In order to help customers develop applications with EC21, Quectel supplies an evaluation board (EVB), USB to RS-232 converter cable, earphone, antenna and other peripherals to control or test the module.
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LTE Module Series EC21 Hardware Design 3 Application Interfaces 3.1. General Description EC21 is equipped with 80 LCC pads plus 64 LGA pads that can be connected to cellular application platform.
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LTE Module Series EC21 Hardware Design 3.2. Pin Description The following tables show the pin definition of EC21 module. Table 3: I/O Parameters Definition Type Description IO Bidirectional DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF Pin No.
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LTE Module Series EC21 Hardware Design 48, 50~54, 56, 72, 85~112 Turn on/off Pin Name PWRKEY RESET_N Pin No. Description DC Characteristics Comment DI Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.8V because of the diode drop in the Qualcomm chipset. DI Reset signal of the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V If unused, keep it open.
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LTE Module Series EC21 Hardware Design (U)SIM Interface Pin Name Pin No. USIM_GND 10 I/O Description DC Characteristics Comment Specified ground for (U)SIM card For 1.8V (U)SIM: Vmax=1.9V Vmin=1.7V USIM_VDD 14 PO Power supply for (U)SIM card For 3.0V (U)SIM: Vmax=3.05V Vmin=2.7V Either 1.8V or 3.0V is supported by the module automatically.
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LTE Module Series EC21 Hardware Design Main UART Interface Pin Name RI DCD CTS RTS DTR TXD RXD Pin No. 62 63 64 65 66 67 68 I/O Description DC Characteristics Comment DO Ring indicator VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DO Data carrier detection VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. Clear to send VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. Request to send VILmin=-0.3V VILmax=0.
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LTE Module Series EC21 Hardware Design ADC0 ADC1 AI General purpose analog to digital converter Voltage range: 0.3V to VBAT_BB If unused, keep it open. 44 AI General purpose analog to digital converter Voltage range: 0.3V to VBAT_BB If unused, keep it open. Pin No. I/O Description DC Characteristics Comment PCM data input VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. DO PCM data output VOLmax=0.45V VOHmin=1.35V 1.8V power domain.
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LTE Module Series EC21 Hardware Design open. SD Card Interface Pin Name SDC2_ DATA3 SDC2_ DATA2 SDC2_ DATA1 Pin No. 28 29 30 I/O IO IO IO Description SD card SDIO bus DATA3 SD card SDIO bus DATA2 SD card SDIO bus DATA1 DC Characteristics 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling: VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.
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LTE Module Series EC21 Hardware Design VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V SDC2_ DATA0 SDC2_CLK SDC2_CMD 31 32 33 EC21_Hardware_Design IO DO IO SD card SDIO bus DATA0 SD card SDIO bus clock SD card SDIO bus command 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling: VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling: VOLmax=0.45V VOHmin=1.4V 3.
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LTE Module Series EC21 Hardware Design SD_INS_ DET VDD_SDIO 23 34 DI SD card insertion detect VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. PO SD card SDIO bus pull-up power IOmax=50mA 1.8V/2.85V configurable. Cannot be used for SD card power. If unused, keep it open. I/O Description DC Characteristics Comment SGMII Interface Pin Name Pin No. For 1.8V: VOLmax=0.45V VOHmin=1.4V EPHY_RST_N 119 DO Ethernet PHY reset For 2.85V: VOLmax=0.
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LTE Module Series EC21 Hardware Design USIM2_VDD 128 PO SGMII MDIO pull-up power source Configurable power source. 1.8V/2.85V power domain. External pull-up for SGMII MDIO pins. If unused, keep it open. SGMII_TX_M 123 AO SGMII transmission - minus If unused, keep it open. SGMII_TX_P 124 AO SGMII transmission - plus If unused, keep it open. SGMII_RX_P 125 AI SGMII receiving - plus If unused, keep it open. SGMII_RX_M 126 AI SGMII receiving - minus If unused, keep it open.
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LTE Module Series EC21 Hardware Design open. AP_READY 2 DI Application processor sleep state detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. I/O Description DC Characteristics Comment DI Force the module to enter into emergency download mode. VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. Active high. If unused, keep it open. I/O Description DC Characteristics Comment USB_BOOT Interface Pin Name USB_BOOT Pin No.
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LTE Module Series EC21 Hardware Design Minimum Functionality Mode AT+CFUN command can set the module to a minimum functionality mode without removing the power supply. In this case, both RF function and (U)SIM card will be invalid. Airplane Mode AT+CFUN command or W_DISABLE# pin can set the module to airplane mode. In this case, RF function will be invalid. Sleep Mode In this mode, the current consumption of the module will be reduced to the minimal level.
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LTE Module Series EC21 Hardware Design    Driving the host DTR to low level will wake up the module. When EC21 has a URC to report, RI signal will wake up the host. Refer to Chapter 3.17 for details about RI behaviors. AP_READY will detect the sleep state of the host (can be configured to high level or low level detection). Please refer to AT+QCFG="apready"* command for details. NOTE “*” means under development. 3.4.1.2.
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LTE Module Series EC21 Hardware Design 3.4.1.3. USB Application with USB Suspend/Resume and RI Function If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is needed to wake up the host. There are three preconditions to let the module enter into the sleep mode.    Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open.
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LTE Module Series EC21 Hardware Design Figure 6: Sleep Mode Application without Suspend Function Switching on the power switch to supply power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host. Refer to document [1] for more details about EC21 power management application. 3.4.2.
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LTE Module Series EC21 Hardware Design 3.5. Power Supply 3.5.1. Power Supply Pins EC21 provides four VBAT pins for connection with the external power supply. There are two separate voltage domains for VBAT.   Two VBAT_RF pins for module’s RF part. Two VBAT_BB pins for module’s baseband part. The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 57, 58 Power supply for module’s RF part. 3.3 3.
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LTE Module Series EC21 Hardware Design To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used, and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and place these capacitors close to VBAT_BB/VBAT_RF pins.
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LTE Module Series EC21 Hardware Design Figure 9: Reference Circuit of Power Supply NOTE In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, the power supply can be cut off. 3.5.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.6. Turn on and off Scenarios 3.6.1.
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LTE Module Series EC21 Hardware Design Figure 10: Turn on the Module by Using Driving Circuit The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. Figure 11: Turn on the Module by Using Button The turn on scenario is illustrated in the following figure.
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LTE Module Series EC21 Hardware Design Figure 12: Timing of Turning on Module NOTE Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms. 3.6.2. Turn off Module The following procedures can be used to turn off the module:   Normal power down procedure: Turn off the module using the PWRKEY pin. Normal power down procedure: Turn off the module using AT+QPOWD command. 3.6.2.1.
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LTE Module Series EC21 Hardware Design Figure 13: Timing of Turning off Module 3.6.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY pin. Please refer to document [2] for details about AT+QPOWD command. NOTE 1. 2. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally.
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LTE Module Series EC21 Hardware Design RESET_N 20 DI Reset the module 1.8V power domain The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N. Figure 14: Reference Circuit of RESET_N by Using Driving Circuit Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated in the following figure.
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LTE Module Series EC21 Hardware Design Figure 16: Timing of Resetting Module NOTES 1. 2. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin failed. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.8. (U)SIM Interface The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards are supported. Table 9: Pin Definition of the (U)SIM Interface Pin Name Pin No. I/O Description Comment Either 1.8V or 3.
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LTE Module Series EC21 Hardware Design high level detections, and is disabled by default. Please refer to document [2] about AT+QSIMDET command for details. The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector. Figure 17: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected.
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LTE Module Series EC21 Hardware Design follow the criteria below in (U)SIM circuit design:       Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length as less than 200mm as possible. Keep (U)SIM card signals away from RF and VBAT traces. Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential.
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LTE Module Series EC21 Hardware Design The USB interface is recommended to be reserved for firmware upgrade in customers’ designs. The following figure shows a reference circuit of USB interface. Figure 19: Reference Circuit of USB Application A common mode choke L1 is recommended to be added in series between the module and customer’s MCU in order to suppress EMI spurious transmission.
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LTE Module Series EC21 Hardware Design 3.10. UART Interfaces The module provides two UART interfaces: the main UART interface and the debug UART interface. The following shows their features.   The main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface is used for data transmission and AT command communication. The debug UART interface supports 115200bps baud rate.
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LTE Module Series EC21 Hardware Design The logic levels are described in the following table. Table 13: Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.6 V VIH 1.2 2.0 V VOL 0 0.45 V VOH 1.35 1.8 V The module provides 1.8V UART interface. A level translator should be used if customers’ application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design.
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LTE Module Series EC21 Hardware Design Figure 21: Reference Circuit with Transistor Circuit NOTE Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps. 3.11.
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LTE Module Series EC21 Hardware Design Figure 22: Primary Mode Timing Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_IN 24 DI PCM data input 1.8V power domain PCM_OUT 25 DO PCM data output 1.
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LTE Module Series EC21 Hardware Design PCM_SYNC 26 IO PCM data frame synchronization signal 1.8V power domain PCM_CLK 27 IO PCM data bit clock 1.8V power domain I2C_SCL 41 OD I2C serial clock Require external pull-up to 1.8V I2C_SDA 42 OD I2C serial data Require external pull-up to 1.8V Clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048KHz PCM_CLK and 8KHz PCM_SYNC.
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LTE Module Series EC21 Hardware Design Table 15: Pin Definition of SD Card Interface Pin Name SDC2_DATA3 SDC2_DATA2 SDC2_DATA1 SDC2_DATA0 SDC2_CLK SDC2_CMD VDD_SDIO Pin No. 28 29 30 31 32 33 34 EC21_Hardware_Design I/O IO IO IO IO DO IO PO Description Comment SD card SDIO bus DATA3 SDIO signal level can be selected according to SD card supported level, more details please refer to SD 3.0 protocol. If unused, keep it open.
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LTE Module Series EC21 Hardware Design SD_INS_DET 23 DI SD card insertion detection 1.8V power domain. If unused, keep it open. The following figure shows a reference design of SD card. Figure 25: Reference Circuit of SD card In SD card interface design, in order to ensure good communication performance with SD card, the following design principles should be complied with:         The voltage range of SD card power supply VDD_3V is 2.7V~3.6V and a sufficient current up to 0.
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LTE Module Series EC21 Hardware Design 3.13. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 command can be used to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltage value on ADC1 pin. For more details about these AT commands, please refer to document [2]. In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground. Table 16: Pin Definition of ADC Interfaces Pin Name Pin No.
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LTE Module Series EC21 Hardware Design Table 18: Pin Definition of Network Connection Status/Activity Indicator Pin Name NET_MODE Pin No. 1) NET_STATUS I/O Description Comment 5 DO Indicate the module’s network registration status 1.8V power domain Cannot be pulled up before startup 6 DO Indicate the module’s network activity status 1.
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LTE Module Series EC21 Hardware Design 3.15. STATUS The STATUS pin is an open drain output for indicating the module’s operation status. Customers can connect it to a GPIO of DTE with a pull up resistor, or as the LED indication circuit shown below. When the module is turned on normally, the STATUS will present the low state. Otherwise, the STATUS will present high-impedance state. Table 20: Pin Definition of STATUS Pin Name STATUS Pin No.
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LTE Module Series EC21 Hardware Design NOTE URC can be outputted from UART port, USB AT port and USB modem port through configuration via AT+QURCCFG command. The default port is USB AT port. In addition, RI behavior can be configured flexibly. The default behavior of the RI is shown as below. Table 21: Behavior of RI State Response Idle RI keeps at high level URC RI outputs 120ms low pulse when a new URC returns The RI behavior can be changed by AT+QCFG="urc/ri/ring" command.
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LTE Module Series EC21 Hardware Design SGMII_MDATA 121 IO SGMII MDIO (Management Data Input/Output) data 1.8V/2.85V power domain SGMII_MCLK DO SGMII MDIO (Management Data Input/Output) clock 1.8V/2.85V power domain PO SGMII MDIO pull-up power source Configurable power source. 1.8V/2.85V power domain. External pull-up power source for SGMII MDIO pins. SGMII_TX_M 123 AO SGMII transmission-minus Connect with a 0.1uF capacitor, close to the PHY side.
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LTE Module Series EC21 Hardware Design The following figure shows a reference design of SGMII interface with PHY AR8033 application. Figure 29: Reference Circuit of SGMII Interface with PHY AR8033 Application In order to enhance the reliability and availability in customers’ applications, please follow the criteria below in the Ethernet PHY circuit design:     Keep SGMII data and control signals away from other sensitive circuits/signals such as RF circuits, analog signals, etc.
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LTE Module Series EC21 Hardware Design Figure 31: Reference Circuit of USB_BOOT Interface EC21_Hardware_Design 3-57 / 105
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LTE Module Series EC21 Hardware Design 4 GNSS Receiver 4.1. General Description EC21 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). EC21 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, EC21 GNSS engine is switched off. It has to be switched on via AT command.
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LTE Module Series EC21 Hardware Design Hot start @open sky Accuracy (GNSS) CEP-50 Autonomous 2.5 s XTRA enabled 1.8 s Autonomous @open sky <1.5 m NOTES 1. 2. 3. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock.
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LTE Module Series EC21 Hardware Design 5 Antenna Interfaces EC21 antenna interfaces include a main antenna interface, an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface. The impedance of the antenna port is 50Ω. 5.1. Main/Rx-diversity Antenna Interfaces 5.1.1. Pin Definition The pin definition of main antenna and Rx-diversity antenna interfaces is shown below.
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LTE Module Series EC21 Hardware Design WCDMA B4 1710~1755 2110~2155 MHz WCDMA B5 824~849 869~894 MHz WCDMA B8 880~915 925~960 MHz LTE FDD B1 1920~1980 2110~2170 MHz LTE FDD B2 1850~1910 1930~1990 MHz LTE FDD B3 1710~1785 1805~1880 MHz LTE FDD B4 1710~1755 2110~2155 MHz LTE FDD B5 824~849 869~894 MHz LTE FDD B7 2500~2570 2620~2690 MHz LTE FDD B8 880~915 925~960 MHz LTE FDD B12 699~716 729~746 MHz LTE FDD B13 777~787 746~756 MHz LTE FDD B18 815~830 860~875 M
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LTE Module Series EC21 Hardware Design Figure 32: Reference Circuit of RF Antenna Interface NOTES 1. 2. 3. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the receiving sensitivity. ANT_DIV function is enabled by default. Place the π-type matching components (R1, C1, C2, R2, C3, C4) as close to the antenna as possible. 5.1.4. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω.
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LTE Module Series EC21 Hardware Design Figure 34: Coplanar Waveguide Line Design on a 2-layer PCB Figure 35: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 36: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: EC21_Hardware_Design 5-63 / 105
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LTE Module Series EC21 Hardware Design      Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground. The distance between the RF pins and the RF connector should be as short as possible, and all the right angle traces should be changed to curved ones. There should be clearance area under the signal pin of the antenna connector or solder joint.
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LTE Module Series EC21 Hardware Design A reference design of GNSS antenna is shown as below. Figure 37: Reference Circuit of GNSS Antenna NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1. Antenna Requirement The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.
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LTE Module Series EC21 Hardware Design Max Input Power: 50 W Input Impedance: 50Ω Cable insertion loss: <1dB (GSM850, GSM900, WCDMA B5/B8, LTE-FDD B5/B8/B12/B13/B18/B19/B20/B26/B28) Cable insertion loss: <1.5dB (DCS1800, PCS1900, WCDMA B1/B2/B4, LTE B1/B2/B3/B4) Cable insertion loss <2dB (LTE-FDD B7, LTE-TDD B40) NOTE It is recommended to use a passive antenna when the module supports B13 or B14, because harmonics will be generated when using an active antenna, which will affect the GNSS performance 1) 5.
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LTE Module Series EC21 Hardware Design U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 39: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 40: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
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LTE Module Series EC21 Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 1.8 A Voltage at Digital Pins -0.3 2.
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LTE Module Series EC21 Hardware Design 6.2. Power Supply Ratings Table 32: Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT_BB and VBAT_RF The actual input voltages must stay between the minimum and maximum values. 3.3 3.8 4.3 V Voltage drop during burst transmission Maximum power control level on GSM900 400 mV IVBAT Peak supply current (during transmission slot) Maximum power control level on GSM900 1.8 2.0 A USB_VBUS USB detection 5.0 5.
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LTE Module Series EC21 Hardware Design 6.4. Current Consumption The values of current consumption are shown below. Table 34: EC21-E Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 uA AT+CFUN=0 (USB disconnected) 1.4 mA GSM900 @DRX=9 (USB disconnected) 1.8 mA DCS1800 @DRX=9 (USB disconnected) 1.8 mA WCDMA PF=64 (USB disconnected) 2.4 mA WCDMA PF=128 (USB disconnected) 1.9 mA FDD-LTE PF=64 (USB disconnected) 3.
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LTE Module Series EC21 Hardware Design EDGE data transfer (GNSS OFF) WCDMA data transfer (GNSS OFF) LTE data transfer (GNSS OFF) GSM voice call WCDMA voice call EC21_Hardware_Design DCS1800 2DL/3UL @28.8dBm 431 mA DCS1800 1DL/4UL @29.
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LTE Module Series EC21 Hardware Design WCDMA B5 @23.61dBm 741 mA WCDMA B8 @23.35dBm 564 mA Table 35: EC21-A Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 10 uA AT+CFUN=0 (USB disconnected) 1.25 mA WCDMA PF=64 (USB disconnected) 2.03 mA WCDMA PF=128 (USB disconnected) 1.65 mA LTE-FDD PF=64 (USB disconnected) 2.31 mA LTE-FDD PF=128 (USB disconnected) 1.85 mA WCDMA PF=64 (USB disconnected) 23.1 mA WCDMA PF=64 (USB connected) 32.
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LTE Module Series EC21 Hardware Design WCDMA B4 @22.91dBm 590.0 mA WCDMA B5 @23.06dBm 493.0 mA Table 36: EC21-V Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 10 uA AT+CFUN=0 (USB disconnected) 1.07 mA LTE-FDD PF=64 (USB disconnected) 2.85 mA LTE-FDD PF=128 (USB disconnected) 2.26 mA Idle state (GNSS OFF) LTE-FDD PF=64 (USB disconnected) 22.0 mA LTE-FDD PF=64 (USB connected) 32.0 mA LTE data transfer (GNSS OFF) LTE-FDD B4 @22.77dBm 762.
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LTE Module Series EC21 Hardware Design WCDMA data (GNSS OFF) LTE data transfer (GNSS OFF) WCDMA voice call WCDMA B1 HSDPA @22.59dBm 589.0 mA WCDMA B1 HSUPA @22.29dBm 623.0 mA WCDMA B5 HSDPA @22.22dBm 511.0 mA WCDMA B5 HSUPA @21.64dBm 503.0 mA LTE-FDD B1 @23.38dBm 813.0 mA LTE-FDD B3 @22.87dBm 840.0 mA LTE-FDD B5 @23.12dBm 613.0 mA LTE-FDD B7 @22.96dBm 761.0 mA LTE-FDD B28 @23.31dBm 650.0 mA WCDMA B1 @24.21dBm 687.0 mA WCDMA B5 @23.18dBm 535.
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LTE Module Series EC21 Hardware Design LTE data transfer (GNSS OFF) WCDMA voice call WCDMA B5 HSUPA @22.87dBm 610.0 mA WCDMA B8 HSDPA @22.37dBm 549.0 mA WCDMA B8 HSUPA @22.09dBm 564.0 mA LTE-FDD B1 @23.28dBm 789.0 mA LTE-FDD B3 @23.2dBm 768.0 mA LTE-FDD B5 @23.05dBm 669.0 mA LTE-FDD B8 @23.21dBm 693.0 mA LTE-FDD B28 @22.9dBm 795.0 mA WCDMA B1 @23.43dBm 672.0 mA WCDMA B5 @23.32dBm 616.0 mA WCDMA B8 @23.31dBm 592.
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LTE Module Series EC21 Hardware Design Table 40: EC21-KL Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 10 uA AT+CFUN=0 (USB disconnected) 1.08 mA LTE-FDD PF=64 (USB disconnected) 2.1 mA LTE-FDD PF=128 (USB disconnected) 1.4 mA LTE-FDD PF=64 (USB disconnected) 24.8 mA LTE-FDD PF=64 (USB connected) 33.5 mA LTE-FDD B1 @23.0dBm 771.0 mA LTE-FDD B3 @23.36dBm 780.0 mA LTE-FDD B5 @23.56dBm 628.0 mA LTE-FDD B7 @23.32dBm 754.
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LTE Module Series EC21 Hardware Design Table 42: RF Output Power Frequency Max. Min. GSM850/GSM900 33dBm±2dB 5dBm±5dB DCS1800/PCS1900 30dBm±2dB 0dBm±5dB GSM850/GSM900 (8-PSK) 27dBm±3dB 5dBm±5dB DCS1800/PCS1900 (8-PSK) 26dBm±3dB 0dBm±5dB WCDMA bands 24dBm+1/-3dB <-49dBm LTE-FDD bands 23dBm±2dB <-39dBm LTE-TDD bands 23dBm±2dB <-39dBm NOTE In GPRS 4 slots TX mode, the maximum output power is reduced by 3.0dB. The design conforms to the GSM specification as described in Chapter 13.
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LTE Module Series EC21 Hardware Design LTE-FDD B5 (10M) -98.0dBm -98.5dBm -101.0dBm -94.3dBm LTE-FDD B7 (10M) -97.0dBm -94.5dBm -99.5dBm -94.3dBm LTE-FDD B8 (10M) -97.0dBm -97.0dBm -101.0dBm -93.3dBm LTE-FDD B20 (10M) -97.5dBm -99.0dBm -102.5dBm -93.3dBm Table 44: EC21-A Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO1) 3GPP (SIMO) WCDMA B2 -110.0dBm / / -104.7dBm WCDMA B4 -110.0dBm / / -106.7dBm WCDMA B5 -110.5dBm / / -104.
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LTE Module Series EC21 Hardware Design LTE-FDD B5 (10M) -98.0dBm -99.0dBm -102.5dBm -94.3dBm LTE-FDD B7 (10M) -97.0dBm -95.0dBm -98.5dBm -94.3dBm LTE-FDD B28 (10M) -97.0dBm -99.0dBm -102.0dBm -94.8dBm Table 47: EC21-KL Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO1) 3GPP (SIMO) LTE-FDD B1 (10M) -98.0dBm -99.5dBm -100.5dBm -96.3dBm LTE-FDD B3 (10M) -97.0dBm -97.5dBm -99.5dBm -93.3dBm LTE-FDD B5 (10M) -98.0dBm -99.5dBm -100.5dBm -94.
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LTE Module Series EC21 Hardware Design WCDMA B8 -111.0dBm / / -103.7dBm LTE-FDD B1 (10M) -97.7dBm -97.5dBm -101.3dBm -96.3dBm LTE-FDD B3 (10M) -98.2dBm -98.6dBm -102.7dBm -93.3dBm LTE-FDD B5 (10M) -98.7dBm -98.2dBm -102.5dBm -94.3dBm LTE-FDD B8 (10M) -98.2dBm -98.2dBm -102.3dBm -93.3dBm LTE-FDD B28 (10M) -98.0dBm -98.7dBm -102.1dBm -94.8dBm Table 50: EC21-AU Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO1) 3GPP (SIMO) GSM850 -109.0dBm / / -102.
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LTE Module Series EC21 Hardware Design LTE-TDD B40 (10M) -97.2dBm -98.4dBm -101.2dBm -96.3dBm NOTE SIMO is a smart antenna technology that uses a single antenna at the transmitter side and two antennas at the receiver side, which can improve RX performance. 1) 6.7. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components.
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LTE Module Series EC21 Hardware Design    Make sure the ground pads of the module and PCB are fully connected. According to customers’ application demands, the heatsink can be mounted on the top of the module, or the opposite side of the PCB area where the module is mounted, or both of them. The heatsink should be designed with as many fins as possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and module/PCB.
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LTE Module Series EC21 Hardware Design NOTE The module offers the best performance when the internal BB chip stays below 105°C. When the maximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.). When the maximum BB chip temperature reaches or exceeds 115°C, the module will disconnect from the network, and it will recover to network connected state after the maximum temperature falls below 115°C.
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LTE Module Series EC21 Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. The tolerances for dimensions without tolerance values are ±0.05mm. 7.1. Mechanical Dimensions of the Module 2.4±0.2 29.0±0.15 32.0±0.15 0.
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LTE Module Series EC21 Hardware Design Figure 44: Module Bottom Dimensions (Bottom View) EC21_Hardware_Design 7-85 / 105
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LTE Module Series EC21 Hardware Design 7.2. Recommended Footprint Figure 45: Recommended Footprint (Top View) NOTES 1. 2. The keep out area should not be designed. For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB.
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LTE Module Series EC21 Hardware Design 7.3. Design Effect Drawings of the Module Figure 46: Top View of the Module Figure 47: Bottom View of the Module NOTE These are design effect drawings of EC21 module. For more accurate pictures, please refer to the module that you get from Quectel.
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LTE Module Series EC21 Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage EC21 is stored in a vacuum-sealed bag. The storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:   Mounted within 168 hours at the factory environment of ≤30ºC/60%RH Stored at <10%RH 3.
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LTE Module Series EC21 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.20mm. For more details, please refer to document [4].
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LTE Module Series EC21 Hardware Design 8.3. Packaging 1 0. 29.3± 0.15 0.35± 0.05 30.3± 0.15 ± 50 1. 44.00± 0.3 20.20± 0.15 44.00± 0.1 2.00± 0.1 4.00± 0.1 30.3± 0.15 1.75± 0.1 EC21 is packaged in tape and reel carriers. One reel is 11.88m long and contains 250pcs modules. The figure below shows the packaging details, measured in mm. 4.2± 0.15 3.1± 0.15 32.5± 0.15 33.5± 0.15 32.5± 0.15 33.5± 0.15 48.5 Cover tape 13 100 Direction of feed 44.5+0.20 -0.
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LTE Module Series EC21 Hardware Design 9 Appendix A References Table 52: Related Documents SN Document Name Remark [1] Quectel_EC2x&EG9x&EM05_Power_Management_ Application_Note Power management application notefor EC25, EC21, EC20 R2.0, EC20 R2.
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LTE Module Series EC21 Hardware Design DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System GMSK Gaussian Minimum Shift Keying GNSS Global Navigation Satellite System GPS Global Positioning System GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access H
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LTE Module Series EC21 Hardware Design PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized Rx Receive SGMII Serial Gigabit Media Independent Interface SIM Subscriber Identification Module SIMO Single Input Multiple Output SMS Short Message Service TDD Time Division Duplexing TDMA Time Division Multiple Access TD-SCDMA Time Divis
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LTE Module Series EC21 Hardware Design VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access EC21_Hardwar
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LTE Module Series EC21 Hardware Design 10 Appendix B GPRS Coding Schemes Table 54: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl. USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
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LTE Module Series EC21 Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
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LTE Module Series EC21 Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 EC21_Hardware_Design 11-97 / 105
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LTE Module Sires EC21 Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 56: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.
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FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only.
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If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs: A certified modular has the option to use a permanently affixed label, or an electronic label.
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computer disk or over the Internet, the information required by this section may be included in the manual in that alternative form, provided the user can reasonably be expected to have the capability to access information in that form. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.