300/300-P Series Industrial Grade SSD Product Manual Cactus Technologies Limited Suite C, 15/F, Capital Trade Center 62 Tsun Yip Street, Kwun Tong Kowloon, Hong Kong Tel: +852-2797-2277 Email: sales@cactus-tech.com Cactus USA 3112 Windsor Road Suite A356 Austin, Texas 78703 Tel: +512-775-0746 Email: americas@cactus-tech.com Cactus-Tech.
The information in this manual is believed to be accurate at the time of publication but is subject to change without notice. Cactus Technologies® Limited shall not be liable for technical or editorial errors or omissions contained herein; nor for incidental or consequential damages resulting from the furnishing, performance, or use of this material.
CONTENTS Table of 1 . Introduction to Cactus Technologies 300/300-P Series Industrial Grade SSD Products ....................................................................................... 1 1.1.Supported Standards..................................................................................................................... 2 1.2.Product Features............................................................................................................................ 2 1.2.1.
CONTENTS Table of 5. ATA Command Description......................................................................................... 21 5.1.ATA Command Set........................................................................................................................ 21 5.1.1.Check Power Mode-98H, E5H....................................................................................... 22 5.1.2.Execute Drive Diagnostic-90H....................................................................
CONTENTS Table of Appendix B.Technical Support Services................................................................. 47 Appendix C.Cactus Technologies® Worldwide Sales Offices................ 48 Appendix D.Limited Warranty......................................................................................... 49 Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
01 Introduction to Cactus Technologies 300/300-P Series Industrial Grade SSD Products Features • Solid state design with no moving parts • Industry standard 2.5” or 1.8” IDE Drive form factor • Supports ATA PIO Modes 0-4 • Supports MultiWord DMA Modes 0-2 • Supports UDMA Modes 0-4 • High reliability, MTBF > 4,000,000 hrs. • E nhanced error correction, < 1 error in 1014 bits read • I ntelligent power management to reduce power consumption • Dual voltage support: 3.3V/5.
1.1. Supported Standards Cactus Technologies SSD is fully electrically compatible with the following specification: • ATA 5 Specification published by ANSI: X3.221 AT Attachment Interface for Disk Drives 1.2. Product Features Cactus Technologies Industrial SSD contains a high level, intelligent controller. This intelligent controller provides many capabilities including the following: • Standard ATA register and command set (same as found on most magnetic disk drives).
1.2.3. Intelligent Power Management Cactus Technologies SSDs employ sophisticated power management algorithms to conserve power. Upon completion of a command, the drive will automatically enter sleep mode if no further commands are received. In most situations, the drive will be in sleep mode except when the host is accessing it, thus conserving power. When the drive is in sleep mode, any command issued to the drive will cause it to exit sleep and respond. 1.2.4.
02 Product Specifications For all the following specifications, values are defined at ambient temperature and nominal supply voltage unless otherwise stated. 2.1. System Environmental Specifications Cactus Industrial SSD Table 2-1. Environmental Specifications Temperature Humidity Operating: 0° C to +70° C (Standard) -45° C to +90° C (Extended) Operating & Non-Operating: 8% to 95%, non-condensing 0 dB Acoustic Noise Vibration Operating & Non-Operating: 20 G MIL-STD-883G Method 2005.
2.3. System Performance All performance numbers are typical values assuming the card controller is in the default (i.e., fastest) mode. Table 2-3. Performance Start Up Times Reset to ready: 35 msec typical Read Transfer Rate up to 35.0 Mbytes/sec* Write Transfer Rate up to 20.0 Mbytes/sec * Controller Overhead 2.4. Command to DRQ 2 msec maximum System Reliability Table 2-4.
2.5.1. 2.5" SSD Physical Specifications Figure 2-1. 2.5" SSD Dimensions Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
2.5.2. 1.8" SSD Physical Specifications Figure 2-2. 1.8" SSD Dimensions Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
2.6. Capacity Specifications Table 2-5 shows the specific capacity for the various models and the default number of heads, sectors/track and cylinders. Table 2-5. Model Capacities Capacity Capacity (formatted) Sectors/ Drive (Max LBA+1) No. of Heads No. of Sectors/ Track No.
03 Interface Description The following sections provide detailed information on the Cactus Technologies Industrial SSD interface. 3.1. SSD Pin Assignments and Pin Type The signal/pin assignments are listed in Table 3-6. Low active signals have a “-” prefix. Pin types are Input, Output or Input/Output. Sections 3.3.1 to 3.3.4 define the DC characteristics for all input and output type structures. Table 3-6.
3.2. Signal Description Table 3-7 describes the I/O signals. Signals whose source is the host are designated as inputs while signals that the SSD sources are outputs. The SSD logic levels conform to those specified in the ANSI ATA Specification. Table 3-7. Signal Description Signal Name Dir. Description A2—A0 I -PDIAG I/O This input/output is the Pass Diagnostic signal in the Master/Slave handshake protocol.
Signal Name Dir. Description -IOWR/STOP I The I/O Write strobe pulse is used to clock I/O data on the Data bus into the SSD for PIO data-out and register transfers. Data is latched by the device on the rising edge of this signal. In UDMA transfers, STOP is asserted by the host to signal the termination of the UDMA burst. INTRQ O This signal is the active high Interrupt Request to the host. -RESET I This input pin is the active low hardware reset from the host. VCC -- +5 V, +3.3 V power.
3.3. Electrical Specification The following table defines all D.C. Characteristics for the SSD Series. Unless otherwise stated, conditions are: Vcc = 5V ± 10% or Vcc = 3.3V ± 10% Ta = -45°C to 90°C 3.3.1. Absolute Maximum Ratings Parameter Symbol MIN MAX Units Storage Temperature Ts -65 +150 °C Operating Temperature TA -45 +90 °C Vcc with respect to GND Vcc -0.3 6.5 V Symbol MIN MAX Units Vin -0.5 Vcc + 0.5 V Vout -0.3 Vcc + 0.
h 3.4.
04 ATA Drive Register Set Definition and Protocol The communication to or from the SSD is done using the Task File registers, which provide all the necessary registers for control and status information. The ATA interface connects peripherals to the host using four register mapping methods. Table 4-8 is a detailed description of these methods. Table 4-8.
4.2. ATA Registers 4.2.1. Data Register (Address-1F0[170]) The Data Register is a 16-bit register, and it is used to transfer data blocks between the SSD data buffer and the Host. 4.2.2. Error Register (Address-1F1[171]; Read Only) This register contains additional information about the source of an error when an error is indicated in bit 0 of the Status register.
4.2.5. Sector Number (LBA 7-0) Register (Address-1F3[173]) This register contains the starting sector number or bits 7-0 of the Logical Block Address (LBA) for any SSD data access for the subsequent command. 4.2.6. Cylinder Low (LBA 15-8) Register (Address-1F4[174]) This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the Logical Block Address. 4.2.7.
4.2.9. Status and Alternate Status Registers (Address 1F7[177] and 3F6[376]) These registers return the status when read by the host. Reading the Status register does clear a pending interrupt while reading the Auxiliary Status register does not.
Bit 7 This bit is used in 48-bit addressing mode. When cleared, the host can read the most recently written values of the Sector Count,Drive/Head and LBA registers. When set, the host will read the previous written values of these registers. A write to any Command block register will clear this bit. Bit 6 This bit is an X (Do not care). Bit 5 This bit is an X (Do not care). Bit 4 This bit is an X (Do not care). Bit 3 This bit is ignored by the drive.
Bit 7 This bit is unknown. Implementation Note: Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the SSD. Following are some possible solutions to this problem: 1. Locate the SSD at a non-conflicting address (i.e., Secondary address (377) when a Floppy Disk Controller is located at the Primary addresses). 2. Do not install a Floppy and a SSD in the system at the same time. 3.
05 ATA Command Description This section defines the software requirements and the format of the commands the host sends to the Industrial SSD products. Commands are issued by loading the required registers in the command block with the supplied parameters, and then writing the command code to the Command Register. The manner in which a command is accepted varies. There are three classes (see Table 5-10) of command acceptance, all dependent on the host not issuing commands unless the drive is not busy.
Class COMMAND Code FR SC SN CY DH LBA 1 Set Sleep Mode E6h or 99h - - - - D - 1 Stand By E2h or 96h - - - - D - 1 Stand By Immediate E0h or 94h - - - - D - 1 Translate Sector 87h - Y Y Y Y Y 1 Wear Level F5h - - - - Y - 2 Write Buffer E8h - - - - D - 2 Write Long Sector 32h or 33h - - Y Y Y Y 3 Write Multiple C5h - Y Y Y Y Y 3 Write Multiple w/o Erase CDh - Y Y Y Y Y 2 Write Sector(s) 30h or 31h - Y Y Y Y Y 2
5.1.2. Execute Drive Diagnostic-90H The Executive Drive Diagnostic command in Table 5-12 performs the internal diagnostic tests implemented by the drive. Table 5-12. Executive Drive Diagnostic Bit -> 7 6 5 4 Command (7) 3 2 1 0 1 0 90H C/D/H (6) X Drive X Cyl High (5) X Cyl Low (4) X Sec Num (3) X Sec Cnt (2) X Feature (1) X A code of 01h will be returned in the Error Register at the end of the command. 5.1.3. Erase Sector(s)-C0H Table 5-13.
This command writes the desired head and cylinder of the selected drive with a vendor unique pattern. To remain host backward compatible, the drive expects a sector buffer of data from the host to follow the command with the same protocol as the Write Sector(s) command although the information in the buffer is not used by the drive. If LBA=1 then the number of sectors to format is taken from the Sec Cnt register (0=256). 5.1.5.
Word Address Default Value Total Bytes Data Field Type Information 48 0000H 2 Double Word not supported. 49 0F00H 2 Capabilities: DMA Supported in True IDE mode (bit 8), LBA supported (bit 9). 50 0000H 2 Reserved. 51 0200H 2 PIO data transfer cycle timing mode 52 0000H 2 Single Word DMA data transfer cycle timing mode (not supported). 53 0007H 2 Data fields 54-58,64-70 and 88 are valid. 54 XXXX 2 Current numbers of cylinders. 55 XXXX 2 Current numbers of heads.
5.1.6. Idle-97H, E3H These commands are treated as NOPs by the drive. Since the drive goes into sleep mode after every command, these extra IDLE commands are redundant. Table 5-17. Idle Bit -> 7 6 5 4 Command (7) 3 2 1 0 1 0 E3H or 97H C/D/H (6) X Drive X Cyl High (5) X Cyl Low (4) X Sec Num (3) X Sec Cnt (2) X Feature (1) X 5.1.7. Idle Immediate-95H, E1H Table 5-18.
5.1.9. Read Buffer-E4H The Read Buffer command in Table 5-20 enables the host to read the current contents of the SSD’s sector buffer. This command has the same protocol as the Read Sector(s) command. Table 5-20. Read Buffer Bit -> 7 6 5 4 Command (7) 3 2 1 0 E4H C/D/H (6) X Drive X Cyl High (5) X Cyl Low (4) X Sec Num (3) X Sec Cnt (2) X Feature (1) X 5.1.10. Read Multiple-C4H The Read Multiple command in Table 5-21 performs similarly to the Read Sectors command.
Interrupts are generated when DRQ is set at the beginning of each block or partial block. The error reporting is the same as that on a Read Sector(s) Command. This command reads from 1 to 256 sectors as specified in the Sector Count register. A sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. At command completion, the Command Block Registers contain the cylinder, head and sector number of the last sector read.
Table 5-23. Read Sectors Bit -> 7 6 5 Command (7) C/D/H (6) 4 3 2 1 0 20H or 21H 1 LBA 1 Drive Head (LBA 27-24) Cyl High (5) Cylinder High (LBA 23-16) Cyl Low (4) Cylinder Low (LBA 15-8) Sec Num (3) Sector Number (LBA 7-0) Sec Cnt (2) Sector Count Feature (1) X 5.1.13. Read Verify Sector(s)-40H, 41H The Read Verify Sector(s) command in Table 5-24 is identical to the Read Sectors command, except that DRQ is never set and no data is transferred to the host.
5.1.14. Recalibrate-1XH The Recalibrate command in Table 5-25 is effectively a NOP command to the drive and is provided for compatibility purposes. After this command is executed the Cyl High and Cyl Low as well as the Head number will be 0 and Sec Num will be 1 if LBA=0 and 0 if LBA=1 (i.e., the first block in LBA is 0 while CHS mode the sector number starts at 1). Table 5-25.
Table 5-27. Extended Error Codes Extended Error Code Description 01h Self Test OK (No Error) 03h Write Failed 09h Miscellaneous Error 11h Uncorrectable ECC Error 18h Corrected ECC Error 20h Invalid Command 21h Invalid Address 27h Write Protection Violation 5.1.16. Seek-7XH The Seek command in Table 5-28 is effectively a NOP command to the drive although it does perform a range check of cylinder and head or LBA address and returns an error if the address is out of range. Table 5-28.
Table 5-30. Features Supported Feature Operation 03H Set transfer mode. 55H Disable Read Look Ahead. 66H Disable Power on Reset (POR) establishment of defaults at Soft Reset. 69H NOP; accepted for backward compatibility. 81H NOP; accepted for backward compatibility. 96H NOP; accepted for backward compatibility. 97H NOP; accepted for backward compatibility. BBH 4 bytes of data apply on Read/Write Long commands. CCH Enable Power on Reset (POR) establishment of defaults at Soft Reset.
5.1.19. Set Sleep Mode-99H, E6H These commands are treated as NOPs by the drive. Since the drive goes into sleep mode after every command execution, these extra SLEEP commands are redundant. Table 5-32. Set Sleep Mode Bit -> 7 6 5 Command (7) 4 3 2 1 0 E6H or 99H C/D/H (6) X Drive X Cyl High (5) X Cyl Low (4) X Sec Num (3) X Sec Cnt (2) X Feature (1) X 5.1.20. Standby-96H, E2H The Standby and Standby Immediate commands are treated as NOPs by the drive.
5.1.22. Translate Sector-87H This is a NOP command for the drive. The sector count register will always return 0. Table 5-35. Translate Sector Bit -> 7 6 5 4 Command (7) C/D/H (6) 3 2 1 0 87H 1 LBA 1 Drive Head (LBA 27-24) Cyl High (5) Cylinder High (LBA 23-16) Cyl Low (4) Cylinder Low (LBA 15-8) Sec Num (3) Sector Number (LBA 7-0) Sec Cnt (2) X Feature (1) X 5.1.23.
5.1.25. Write Long Sector-23H, 33H The Write Multiple command in Table 5-38 is provided for compatibility purposes and is similar to the Write Sector(s) command except that it writes 516 bytes instead of 512 bytes. Only single sector Write Long operations are supported. The transfer consists of 512 bytes of data transferred in word mode followed by 4 bytes of vendor unique data supplied by the host. The drive discards these four bytes and writes the sector with valid ECC fields.
DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode command, which must be executed prior to the Write Multiple command. When the Write Multiple command is issued, the Sector Count Register contains the number of sectors (not the number of blocks or the block count) requested.
5.1.28. Write Sector(s)-30H, 31H The Write Sectors command in Table 5-41 writes from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is accepted, the drive sets BSY, then sets DRQ and clears BSY, then waits for the host to fill the sector buffer with the data to be written. No interrupt is generated to start the first buffer fill operation.
5.1.30. Write Verify Sector(s)-3CH The Write Verify Sector(s) command in Table 5-43 writes and verifies from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is accepted, the drive sets BSY, then sets DRQ and clears BSY, then waits for the host to fill the sector buffer with the data to be written.
Command Error Register BBK UNC IDNF Status Register ABRT AMNF Initialize Drive Parameters DRDY DWF V Read Buffer V DSC CORR ERR V V V V V V Read DMA V V V V V V V V V V Read Multiple V V V V V V V V V V Read Long Sector V V V V V V V Read Sector(s) V V V V V V V V V V Read Verify Sectors V V V V V V V V V V V V V V V V Recalibrate V V Request Sense V V V V V V V Set Features V V V V V Set Multiple Mode V V V V
06 300-P Firmware Specifications The following sections describe in detail the enhanced firmware features available only in the Cactus Technologies -300-P series SSD devices. 6.1. ATA Mode Security Feature Set This feature set implements all the required commands of the ATA Security Mode Feature Set as defined in the ATA7 specifications.
6.2.1. Command Structure CTLock™ command is a Vendor Specific ATA Command with the following task file structure: Register 7 6 Feature 5 4 3 Reserved Sector Count 01h Sector Number N/A Cylinder Low N/A Cylinder High N/A Drive/Head 1 0 1 D 0 Command 2 1 0 Lock Erase Unlock Lock 0 0 0 83h CTLock™ is a PIO Data Out command. Upon issuing the command and receiving a data ready status from the drive, the host will send over 1 sector (512bytes) of data.
If the CTLock™ command is issued with the Lock code and bit 2 of Feature Reg. set, the previously saved Lock code will be erased and the drive will revert back to normal operation with VS Lock disabled. To re-enable the VS Lock mode, the host must reissue a CTLock™ command with a Lock code and the Lock bit set. Note that bits 0,1 & 2 of the Feature Reg. are mutually exclusive.
bit[1:0] These two bits determine the type of operation to be performed for sequence 1. The coding is the same as for sequence 3. For sequence 1, an optional ‘count’ can be specified. If count=0, the sequence is performed only once. For non-zero counts, the sequence is repeated for count+1 times. By default, if none of the optional parameters are specified, the firmware will perform an erase only operation when this command is issued. 6.3.2.
Operation Opcode Parameter 1 Parameter 2 Count 0x8e 0x55 0xAA 0x00 IREC (IRIG) 106 Erase and overwrite with 0x55, then erase and overwrite with 0xAA, then erase 6.3.3. Status Reporting When CTPurge™ is completed, the drive will return ready status but will no longer be able to process any new ATA commands as all internal firmware has been erased. 6.3.4.
6.4. CTWPROT™ CTWPROT™ enables write protect function on the entire Cactus card/drive. This feature can be activated in hardware or software. Hardware activation is by a mechanical write protect jumper. The write protect function can be toggled on/off by the user during use in the field. When the write protect function is activated, all subsequent Write commands that attempt to store data to the flash memory will be aborted and an Error status will be returned to the host.
Appendix A Ordering Information Model KCDXFY-30MZ-P Where X is card capacities: 128M.........................................................................................................................128MB 256M ........................................................................................................................256MB 512M ....................................................................................................................... 512MB 1G .................................
Appendix B Technical Support Services Cactus Technologies® Limited Suite C, 15/F, Capital Trade Center 62 Tsun Yip Street, Kwun Tong Kowloon, Hong Kong Tel: +852-27972261 Fax: +852-27973777 Email: tech@cactus-tech.com Cactus Technologies® Limited Santa Clara, CA 95054 Email: tech@cactus-tech.com Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
Appendix C Cactus Technologies debra.park2 debra.park2zz z vzv v z Offices v Worldwide Sales ® z Cactus Technologies® Limited Suite C, 15/F, Capital Trade Center 62 Tsun Yip Street, Kwun Tong Kowloon, Hong Kong Tel: +852-27972277 Fax: +852-27973777 Email: sales@cactus-tech.com Cactus® USA 3112 Windsor Road Suite A-356 Austin, Texas Tel: +512-775-0746 Email: americas@cactus-tech.com Cactus Technologies® 300/300-P Series Industrial Grade SSD Product Manual v2.
Appendix D Limited Warranty I. WARRANTY STATEMENT Cactus Technologies® warrants its Industrial Grade products only to be free of any defects in materials or workmanship that would prevent them from functioning properly for five years from the date of purchase. This express warranty is extended by Cactus Technologies® Limited II. GENERAL PROVISIONS This warranty sets forth the full extent of Cactus Technologies®' responsibilities regarding the Cactus Industrial Grade SSD products.
failure, each product will be analyzed, by whatever means necessary, to determine the root cause of failure. If the root cause of failure is found to be not covered by the above provisions, then the product will be returned to the customer with a report indicating why the failure was not covered under the warranty.