l ti a en fid Co n rr ot Ba i410e-s_Datasheet July 24, 2019 Version 3.
i410e-s Datasheet VERSION HISTORY AMENDMENT Initial version DATE 2014-02-19 1.1 Update Table 6 PIN 25&26 descriptions Add Tolerance Add Package information 2014-05-08 AUTHOR Wan Zhifu Li Li Li Li 2015-04-03 2015-07-03 Gong Yong Daming Tang Update pin description Update Bluetooth 4.1 spec Change contact info Add BQB,Telec certificate Add Appendix Add MOQ Modify the certificate Add net weight Update Bluetooth 4.0 spec Update Bluetooth 4.1 spec Add support for encryption mode.
i410e-s Datasheet Contents Ba rr ot Co n fid en ti a l 1. Block Diagram ......................................................................................................... 6 1.1. Crystal ........................................................................................................... 6 1.2. EEPROM ........................................................................................................ 6 1.3. Low Pass Filter ............................................................
i410e-s Datasheet Ba rr ot Co n fid en ti a l 11. Contact Information .............................................................................................. 22 11.1. Beijing ......................................................................................................... 22 11.2. Shenzhen .................................................................................................... 23 11.3. Shanghai ...............................................................................
i410e-s Datasheet Healthcare i410e-s Datasheet Home entertainment DESCRIPTION Office and mobile accessories i410e-s is a Bluetooth 4.1 single-mode module. It provides a Bluetooth Low Energy fully compliant system for data communication with BRT BlueLet stack. It allows your target devices to send and receive data via Bluetooth 4.1 without connecting a serial cable to your computer.
i410e-s Datasheet 1. Block Diagram Co n fid en ti a l i410e-s’s block diagram is illustrated in Figure2 below. Figure 2: i410e-s Block Diagram rr ot 1.1. Crystal Ba The crystal oscillates include 16MHz and 32.768 KHz. 16MHz is external reference clock source. 32.768 KHz is used during deep sleep and in other low-power modes. 1.2. EEPROM EEPROM is used for storing the Bluetooth protocol stack, profile and applications. 1.3. Low Pass Filter The filter is a band pass filter (ISM band).
i410e-s Datasheet 1.4. Antenna Default ceramic antenna. If an external antenna is used, the ceramic antenna must be removed 1.5. Synchronous Serial Interface ti a l This is a synchronous serial port interface (SPI) for interfacing with other digital devices. The SPI port can be used for system debugging. It can also be used for programming the Flash memory. en 1.6. UART Co n 1.7.
i410e-s Datasheet i410e-s Bluetooth V4.1 , Class II 2.4~2.48GHz GFSK 50 ohms 16MHz UART/SPI/PIO/AIO 10 m -89dBm@0.1%BER Transmit power Connectivity 0.5dBm Typ. Single point link Antenna type Dimension Ceramic Antenna Dimension Power Operating voltage Operation Environment Temperature MSL 9mm×13.3mm×1.75mm(Tolerance:±0.25mm) ti a en fid 1.8 -3.
Co n fid en ti a l i410e-s Datasheet Figure 3: i410e-s PIN diagram Table 2：PIN Description PIN NO. 1 AIO2 2 AIO1 Type rr ot Name AIO0 4 TX 5 RX CMOS Input 6 PIO3 Bidirectional with programmable strength internal Ba 3 Bidirectional analogue Bidirectional analogue Bidirectional analogue CMOS Output Function Analogue programmable I/O line. General-purpose analogue interface pins. Analogue programmable I/O line. General-purpose analogue interface pins. Analogue programmable I/O line.
i410e-s Datasheet PIO4 8 PIO5 / SPI_CLK 9 PIO6 / SPI_CSB 10 PIO7 / SPI_MOS I Programmable I/O line Programmable I/O line or debug SPI CLK selected by SPI_ SEL #. CMOS input for the SPI clock signal with weak internal pull-down. PIO5 and PIO6 are outputs, used to inform the mode group status. Note：The corresponding states of PIO [5:6] are: [00] idle state, [01] broadcast state, [10] successful connection, data cache area is not full, [11] connection state, and data cache area is full.
WAKE 22 GND GND en WAKE Ba 15 16 17 fid 21 14 Programmable I/O line Co n 18 19 20 Bidirectional with programmable strength internal pull-up/down PIO10 Bidirectional with programmable strength internal pull-up/down PIO11 Bidirectional with programmable strength internal pull-up/down GND GND GND GND PIO0/SPI Input with _SEL strong internal pull-down GND GND GND GND VDD_BAT POWER 13 PIO9 rr ot 12 ti a l i410e-s Datasheet The above version applies to I41Xe.STD.0.20171 117.
i410e-s Datasheet 23 GND GND Ground 24 GND GND Ground 25 GND GND Ground 26 EXT_ANT External antenna If use the external antenna interface, the on-board antenna needs to be removed. 4. Electrical Characteristics Table 3： Absolute Maximum Ratings Min -40 1.8 -0.4 VSS-0.4 Max 85 3.6 3.6 VDD+0.4 Unit ℃ V V V Co n fid en Rating Storage temperature Battery (VDD_BAT)operation I/O supply voltage Other terminal voltages ti a l 4.1. Absolute Maximum Ratings 4.2.
-200 - - - 0.4 mV rms 30 µs 50 20 mA - - - - - - rr ot Ba µA µA fid Typ. Max Unit - 0.4 VDD+0.4 25 V V ns - 0.4 V - - V - 5 ns -40 40 -1.0 1.0 - -10 150 -0.33 5.0 5.0 µA µA µA µA µA pF Co n Min Input Voltage Levels VIL input Logic level low -0.4 VIH input logic level high 0.7*VDD Tr/Tf Output Voltage Levels VOL output logic level low, IOL = 4.0mA VOH output logic level 0.75*VDD high, IOH=-4.
Input Voltage Levels Input voltage Min 0 Typ. - i410e-s Datasheet Max Unit 1.3 V 4.3.4. ESD Protection Table 8：ESD Handling Maximum Ratings Deep Sleep ti a l 200V III Description Average All functions are shutdown. To wake up toggle the wake pin. VDD_PADS=ON, REFCLK=OFF, SLEEPCLK=ON, VDD_BAT=ON, RAM=ON, digital circuits=ON, SMPs=ON(low-power mode), 1ms wake-up time rr ot Connected Standby RX/TX active 2 Co n Operation Mode Dormant Unit 2000V(all pins) 200V(all pings) 500V(all pins) fid 4.
Output Power Frequency range Receiver Sensitivity (BER<0.1%) 2400 Min. - 0.5 Typ. -89 i410e-s Datasheet 2 dBm 2483.5 MHz Max. unit -90 dBm 5. Physical Interfaces l 5.1. UART Interface en ti a i410e-s Universal Asynchronous Receiver Transmitter (UART) interface provides a simple mechanism for communicating with other serial devices using the RS232 standard.
i410e-s Datasheet Step Operation 1 2 Reset the SPI interface Write the command word Write the address Write or read data words Termination 3 4 5 Description Hold CSB high for 2 CLK cycles Take CSB low and clock in the 8-bit command Clock in the 16-bit address word Clock in or out 16-bit data words Take CSB high ti a l With the exception of reset, CSB must be held low during the transaction. Data on MOSI is clocked on the rising edge of the clock line CLK.
en ti a l i410e-s Datasheet fid Figure 4: i410e-s Footprint Ba rr ot Co n 6.2.
i410e-s Datasheet 7. Package 7.1. Net weight The module net weight: 0.42 0.05g 7.2. Package ti a l Tray package: 150pcs (10*15) per tray. Tray package size: 25.3cm (L) x20.5cm (W) fid Ba rr ot 8.1. BQB Co n 8. Certification en Each cell size: 13.
i410e-s Datasheet Ba rr ot Co n fid en ti a l 8.2. TELEC 8.3.
Ba rr ot Co n fid en ti a l i410e-s Datasheet When using the product, maintain a distance of 20cm from the body to ensure compliance with RF exposure requirements. FCC statements: This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
i410e-s Datasheet 8.4.
i410e-s Datasheet 9. SRRC This Datasheet is for SRRC certification. en ti a l Equipment label (this part of the label will be reflected on the outer packaging of the product when shipped) fid Figure 6: label Co n 10. Company Profile Ba rr ot Barrot Technology – Barrot is a world leading one-stop chipset level solution provider who offers wireless connectivity and audio intelligent hardware solutions featuring with own IPs.
i410e-s Datasheet Haidian District, Beijing , 100089 P.R. China Marketing Email: marketing@barrot.com.cn marketing@ivtwireless.com Support: support@barrot.com.cn support@ivtwireless.com Web site: www.barrot.com.cn 11.2. Shenzhen ti a l Shenzhen Tel: +86 755 27885822-603 Address:BlockA,2nd Floor, New Deal Industrial Park-B, Xin'an Street, Bao’an Distr ict 71, Shenzhen，518101 Support: support@barrot.com.cn Web site: www.barrot.com.cn en 11.3. Shanghai Co n fid Address: 3rd Floor, No.
i410e-s Datasheet Appendix 1. Storage Requirements 1.1 Temperature: 22~28℃； 1.2 Humidity: <70%（RH）； Vacuum packed and sealed in good condition to ensure 12 months of welding. 2. Humidity Sensitive Characteristic 2.1 MSL: 3 level en ti a l 2.2 Once opened, SMT within 168 hours in the condition of temperature: 22~28 ℃ and humidity<60%（RH）. Once production line stops, modules should either be stored in the drying box or be vacuum packed.
i410e-s Datasheet 3.3.3 Layout Requirements l a. For PCB double sided layout, it is recommended to process on 2nd side. fid 3.3.4 Compatible Design Considerations en ti a b. The layout of other elements should be avoided on the outermost end 1mm area of module pad. In order to increase repair space, other elements layouts should be as far away from the module as possible. The minimum distance between the module pad and PCB board edge is 1.5mm.
i410e-s Datasheet ℃, the solder paste is melting; When the temperature rises to 220℃, lead free BGA solder ball starts to melt, and it is in the state of coexistence of solid and liquid. If lead technology is used and the furnace starts cooling, the original welding surface structure of BGA elements is damaged, and a new alloyed layer of the welding surface cannot be formed.
i410e-s Datasheet Increasing slope（℃/SEC）：1~2 Descending slope（℃/SEC）：-4~-1 Reflow time（S）：40~70 Peak teamperature（℃）：240-248 rr o t Co nf id en ti al The actual furnace temperature curve for Bluetooth modules production: Ba 4.4 Reflow Soldering 4.4.1 When PCBA which is mounted with Bluetooth module and it enters reflow, please strictly ensure PCBA boards to pass through furnace via track path. Passing through furnace via the net cover of reflow oven is prohibited.
i410e-s Datasheet 4.4.3 Interference Design which may lead to offset of module’s elements should be avoided during reflow soldering technique design (i.e. designing furnace jig). 4.4.4 No need to add red glue or other adhesive on the lower part of module. Module recommended pad design can ensure the good solder ability of module PIN foot. Even for any special reason, modules are designed on the first side and need to be reflowed. 4.5 Wave soldering of PCBA after module is mounted ti al 4.5.
i410e-s Datasheet controllable and even heating. It ensures all solder joints melt at the same time. When disassembly, it should avoid any thermal or mechanical damage to modules, PCB, adjacent elements, and their solder joints. 5.3.2 It is recommended to adopt infrared heating or hot air heating method; It is recommended to design & use special jig for module disassembly or pickup 5.4 Module Welding/Replacement 5.4.1 Preparation Before Welding： al 5.4.1.
