DRAFT RVP8 Digital IF Receiver/Doppler Signal Processor User’s Manual May 2003 Copyright 2003 SIGMET, Inc. The designs and descriptions contained in this manual may not be copied, translated or reproduced in any form without the prior written consent of SIGMET, Inc.
RVP8 User’s Manual 12 May 2003 Table of Contents Table of Contents Hardware Limited Warranty . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi 1. Introduction and Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 1.1 System Configuration Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.
RVP8 User’s Manual 12 May 2003 Table of Contents 1.8.7 RVP8 Input/Output Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8.8 Physical and Environmental Characteristics . . . . . . . . . . . . . . . . . . . . . . 2. Hardware Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Overview and Input Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 IFD IF Digitizer Module Installation . . . . . . . . . . . .
RVP8 User’s Manual 12 May 2003 Table of Contents 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.3.6 Mc — Board Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mp — Processing Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mf — Clutter Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mt — General Trigger Setups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mt — Triggers for Pulsewidth #n . . . .
RVP8 User’s Manual 12 May 2003 Table of Contents 5.2.5 Reflectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.6 Velocity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.7 Spectrum Width Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.8 Signal Quality Index (SQI threshold) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.
RVP8 User’s Manual 12 May 2003 Table of Contents 6. Host Computer Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 No-Operation (NOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 Load Range Mask (LRMSK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3 Setup Operating Parameters (SOPRM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.4 Interface Input/Output Test (IOTEST) . .
RVP8 User’s Manual 12 May 2003 Table of Contents A. Software: Basics, Installation and Backup . . . . . . . . . . . . . . . . . . . . . . A–1 A.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.2 Basics of Login, Logout and Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.2.1 Power up procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.2.2 Local and remote login . . . . . .
RVP8 User’s Manual 12 May 2003 Table of Contents E. Installation and Test Procedure (DRAFT) . . . . . . . . . . . . . . . . . . . . . . . E–1 E.1 Installation Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E.2 Power-Up Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E.3 Setup Terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E.
RVP8 User’s Manual 12 May 2003 Table of Contents Figures Figure 1–1: Analog vs Digital Receiver for Magnetron Systems . . . . . . . . . . . . . . Figure 1–2: Analog vs Digital Receiver for Klystron Systems . . . . . . . . . . . . . . . . Figure 1–3: IF to I/Q Processing Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 1–4: I/Q Processing for Weather Moment Extraction . . . . . . . . . . . . . . . . . Figure 2–1: Calibration Plot for a Stand-alone 14-Bit IFD . . . . . . . .
RVP8 User’s Manual 12 May 2003 Table of Contents Tables Table 1–1: Examples of Dual PRF Velocity Unfolding . . . . . . . . . . . . . . . . . . . . . Table 2–1: Differences Among Versions of the IFD . . . . . . . . . . . . . . . . . . . . . . . . Table 2–2: IFD I/O Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 2–3: IFD Toggle Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 2–4: IFD LED Indicator Interpretations . .
RVP8 User’s Manual April 2003 Preface Hardware Limited Warranty SIGMET, Inc. warrants its IRIS hardware (RVP8 and RCP8) to function according to the hardware User’s Manual documentation for a period of one year following delivery. In the event of a failure during the warranty period, the customer should notify SIGMET to obtain a Return Authorization. Upon receiving the Return Authorization from SIGMET, the customer ships the failed unit to SIGMET by pre-paid freight.
RVP8 User’s Manual April 2003 Preface Preface This manual provides technical information on the RVP8 digital receiver and Doppler signal processor. About This Manual This manual is used primarily by engineers for installation and troubleshooting, or by users interested in understanding the signal processing features, algorithms, and control and data formats. Chapter 1, Introduction and Specifications, describes the major features of the RVP8 signal processor and gives its technical specifications.
RVP8 User’s Manual April 2003 Preface Where to Find More Information The following manuals are also available from SIGMET, Inc.: IRIS Installation Manual IRIS Radar Manual IRIS Product & Display Manual Describes the procedures for installing and upgrading IRIS and the specific hardware and software configuration for your facility. Describes the IRIS/Radar software. This manual is for radar operators. Describes the IRIS/Analysis product generation software and the IRIS/Display software.
RVP8 User’s Manual May 2003 Introduction and Specifications 1. Introduction and Specifications The RVP8 Lineage SIGMET Inc. has a 20-year history of supplying innovative, high-quality signal processing products to the weather radar community. The history of SIGMET products reads like a history of weather radar signal processing: Year Model Units Sold 1981 FFT 10 First commercial FFT-based Doppler signal processor for weather radar applications.
RVP8 User’s Manual May 2003 Introduction and Specifications Open Hardware and Software Design Compared to previous processors that were built around proprietary DSP chips, perhaps the most innovative aspect of the RVP8 is that it is implemented on standard PC hardware and software that can be purchased from a wide variety of sources. The Intel Pentium/PCI approach promises continued improvement in processor speed, bus bandwidth and the availability of low–cost compatible hardware and peripherals.
RVP8 User’s Manual May 2003 Introduction and Specifications Standard LAN Interconnection for Data Transfer or Parallel Processing For communication with the outside world, the RVP8 supports as standard a 10/100/1000 Base T Ethernet. For most applications, the 100 BaseT Ethernet is used to transfer moment results (Z, T, V, W) to the applications host computer (e.g., a product generator).
RVP8 User’s Manual May 2003 Introduction and Specifications 1.1 System Configuration Concepts The hardware building blocks of an RVP8 system are actually quite few in number: RVP8/IFD IF Digitizer Unit- This is a separate sealed unit usually mounted in the receiver cabinet. The primary input to the IFD is the received IF signal.
RVP8 User’s Manual May 2003 Introduction and Specifications RVP8 Configuration Example: Basic Magnetron System Optional Digital STALO DAFC Triggers IF Signal IF Magnetron Burst IFD COAX Uplink Fiber Downlink RVP8/Rx ËËËËË ËËËËË ËËËËË 14-Bit SBC RS232C Antenna Angles 10/100 BaseT LAN Interface Mouse Utilities Monitor Keyboard Example 1: Basic Magnetron System The building blocks required to construct the basic system are: IFD- IF Digitizer installed in the radar receiver cabinet.
RVP8 User’s Manual May 2003 Introduction and Specifications RVP8 Configuration Example: High Performance Klystron IF Signal Reference Clock IF Tx Waveform IFD 14-Bit RVP8/Rx COAX Uplink Fiber Downlink Digitally Synthesized COHO IF Tx Waveform Pulse width Triggers Parallel or Synchro AZ Connector Panel Parallell or Synchro EL 10/100/1000 Base T Mouse Utilities Monitor ËËËË I/O 62 ËËËË SBC ËËËË ËËËË RVP8/Tx Keyboard Example 2: Klystron System with Digital Tx In this case, the IFD can receive a
RVP8 User’s Manual May 2003 Introduction and Specifications RVP8 Configuration Example: Dual Polarization Magnetron System Optional Digital STALO Horizontal IF Signal DAFC IFD COAX Uplink 14-Bit IF Magnetron Burst Horz Fiber Downlink Synch Clock COAX Uplink IFD 14-Bit Vertical IF Signal Fiber Downlink Vert Polarization Control Pulse Width Control Triggers Connector Panel Parallel or Synchro AZ Parallell or Synchro EL RVP8/Rx ËËËË I/O 62 ËËËË SBC ËËËË ËËËË RVP8/Rx 10/100/1000 BaseT LAN Mo
RVP8 User’s Manual May 2003 Introduction and Specifications COTS Accessories Aside from the basic PCI cards required for the radar application, there are additional cards that can be installed to meet different customer requirements, e.g., 10/100–BaseT Ethernet card for additional network I/O (e.g., a backup network). RS-232/RS-422 serial cards for serial angles, remote TTY control, etc. Sound card to synthesize audio waveforms for wind profiler applications. GPS card for time synch.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.1.1 IFD IF Digitizer The IFD 14–bit IF digitizer is a totally sealed unit for optimum low–noise performance. The use of digital components within the IFD is minimized and the unit is carefully grounded and shielded to make the cleanest possible digital capture of the input IF signal. Because of this, the IFD achieves the theoretical minimum noise level for the A/D convertors.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.1.2 Digital Receiver PCI Card (RVP8/Rx) The RVP8/Rx card receives the digitized IF samples from the IFD via the fiber optic link. The advantage of this design is that the receiver electronics (LNA, RF mixer, IF preamp, and IFD) can be located as far as 100–meters away from the RVP8 main chassis. This makes it possible to choose optimum locations for both the IFD and the RVP8, e.g.
RVP8 User’s Manual May 2003 Introduction and Specifications Calibration Plot for RVP8/IFD The figure above shows a calibration plot for a 14–bit IFD with the digital filter matched to a 2 microsecond pulse. The performance in this case is >100 dB dynamic range– fully linear.
RVP8 User’s Manual May 2003 Introduction and Specifications Digital IF Band Pass Design Tool The built–in filter design tool makes it easy for anyone to design the optimal IF filter to match each pulse width and application. Simply specify the impulse response and pass band and the filter appears. The user interface makes it easy to widen/narrow the filter with simple keyboard commands. There is even a command to automatically search for an optimal filter.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.1.3 Mother Board or Single-Board Computer (SBC) The dual-CPU Pentium mother board or single-board computer (SBC) acts as the host to the Linux operating system and provides all of the compute resources for processing the I/Q values that are generated by the RVP8/Rx card. Standard keyboard, mouse and monitor connections are on the Rx backpanel, along with a 10/100/1000 BaseT Ethernet port.
RVP8 User’s Manual May 2003 Introduction and Specifications phase/amplitude characteristics may not be precise or repeatable. In contrast, the RVP8/Tx can perform precise phase modulation to any desired angle, without requiring the use of external phase shifting hardware. Pulse Compression- There is increasing demand for siting radars in urban areas that also happen to have strict regulations on transmit emissions.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.1.5 I/O-62 PCI Card and I/O Panel The SIGMET I/O-62 is a short format PCI card that provides extensive I/O capabilities for the RVP8. A typical installation would have one I/O-62 and an RVP8 Connector Panel shown above. The Softplane is used to interconnect the I/O 62 with other SIGMET PCI cards. Note that the identical card is used in the SIGMET RCP8 radar/antenna control processor which in general does not use the Softplane connection.
RVP8 User’s Manual May 2003 Introduction and Specifications Run Time FPGA Configuration The SIGMET I/O-62 card is built around a 100K–Gate FPGA which, in addition to driving the I/O signals on the 62-position connector, also coordinates the PCI and Softplane traffic. These chips are SRAM–based, meaning that they are configured at run time. This allows the FPGA code to be automatically upgraded during each RVP8 code release without needing to physically reprogram any parts.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.2 Comparison of Analog vs Digital Radar Receivers 1.2.1 What is a Digital IF Receiver? A digital IF receiver accepts the analog IF signal (typically 30 MHz), processes it and outputs a stream of wide dynamic range digital “I” and “Q” values. These quantities are then processed to obtain the moment data (e.g., Z, V, W or polarization variables).
RVP8 User’s Manual May 2003 Introduction and Specifications 1.2.2 Magnetron Receiver Example A typical analog receiver for a magnetron system is shown in the top portion of Figure 1–1. The received RF signal from the LNA is first mixed with the STALO (RF–IF) and the resulting IF signal is applied to one of several bandpass filters that match the width of the transmitted pulse. The filter selection is usually done with relays. The narrow band waveform is then split.
RVP8 User’s Manual May 2003 Introduction and Specifications Figure 1–1: Analog vs Digital Receiver for Magnetron Systems Classic Analog Receiver for Magnetron IF Filters Matched to Pulse Widths BPF LOG Analog RF From LNA Analog IF BPF X Split LOG BPF Digital Atten BPF Split STALO Quad Phase Detector AFC Signal Linear Amp Q Control Bits From IAGC Logic Line Drivers Phase Locked IF AFC RF Tx Burst IF Tx Sample Split X I IAGC COHO Low Q Locking COHO RVP8 Magnetron Interface Analog RF
RVP8 User’s Manual May 2003 Introduction and Specifications 1.2.3 Klystron or TWT Receiver and Transmit RF Example A typical analog receiver for a klystron system is shown in the top portion of Figure 1–2. The arrangement of components is similar to the magnetron case, except that the COHO operates at a fixed phase and frequency, a phase shifter is included for 2nd trip echo filtering and there is no AFC feedback required.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.3 RVP8 IF Signal Processing 1.3.1 IFD Data Capture and Timing The RVP8 design concept is to perform very little signal processing within the IFD digitizer module itself. This is to minimize the presence of digital components that might interfere with the clean capture of the IF signals.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.3.2 Burst Pulse Analysis for Amplitude/Frequency/Phase The burst pulse analysis provides the amplitude, frequency and phase of the transmitted pulse. The phase measurement is analogous to the COHO locking that is performed by a traditional magnetron radar. The difference is that the phase is known in the digital technique, so that range dealiasing using the phase modulation techniques is possible.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.3.
RVP8 User’s Manual May 2003 Introduction and Specifications Computation of “I” and “Q” quadrature values (also performed during the band pass filtering step). Transmit burst sample frequency, phase and amplitude calculation I and Q phase and amplitude correction based on transmit burst sample. Interference rejection algorithm. AFC frequency error calculation with output to IFD for digital or analog control of STALO (for magnetron systems).
RVP8 User’s Manual May 2003 Introduction and Specifications 1.4 RVP8 Weather Signal Processing The processing of weather signals by the RVP8 is based on the algorithms used in the previous generation RVP7 and RVP6. However, the performance of the RVP8 allows a different approach to some of the processing algorithms, especially the frequency domain spectrum processing. All of the algorithms start with the wide dynamic range I and Q samples that are obtained from the Rx card over the PCI bus.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.4.1 General Processing features Figure 1–4 shows a block diagram of the processing steps. These are discussed below. Autocorrelations The autocorrelations R0, R1 and R2 are produced by all three processing modes. However, the way that they are produced is different for the three modes, particularly with regard to the filtering that is performed. Pulse Pair Mode– Filtering for clutter is performed in the time domain.
RVP8 User’s Manual May 2003 Introduction and Specifications Time (azimuth) Averaging The autocorrelations are based on input “I” and “Q” values over a selectable number of pulses between 8, 9, 10, ...,256. Any integer number of pulses in this interval may be used including DFT/FFT and random phase modes. Selectable angle synchronization using the input AZ and EL tag lines assures that all possible pulses are used during averaging for each, say, 1 degree interval.
RVP8 User’s Manual May 2003 Introduction and Specifications Thresholding The RVP8 calculates several parameters that are used to threshold (discard) bins with weak or corrupted signals. The thresholding parameters are: Signal quality index (SQI=|R1|/R0) LOG (or incoherent) signal-to-noise ratio (LOG) SIG (coherent) signal-to-noise ratio CCOR clutter correction These parameters are computed for each range bin and can be applied in AND/OR logical expressions independently for dBZ, V and W.
RVP8 User’s Manual May 2003 Introduction and Specifications PRF1 PRF2 Unambiguous Range (km) 3 cm 5 cm 10 cm 500 375 300 11.25 18.75 37.50 1000 750 150 22.50 37.50 75.00 2000 1500 75 45.00 75.00 150.00 500 400 300 15.00 25.00 50.00 1000 800 150 30.00 15.00 100.00 2000 1600 75 60.00 100.00 200.00 Three Times U f ldi Unfolding Four Ti Times Unfolding 1.4.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.4.4 Random Phase Processing for 2nd Trip Echo Second trip echoes can be a serious problem for applications that require operation at a high PRF. Second trip echoes can appear separately or can be overlaid on first trip echoes (second trip obscuration).
RVP8 User’s Manual May 2003 Introduction and Specifications 1.5 RVP8 Control and Maintenance Features 1.5.1 Radar Control Functions The RVP8 also performs several important radar control functions: Trigger generation- up to 6 programmable triggers. Pulsewidth control (four states controlled by four bits). Angle/data synchronization- to collect data at precise azimuth intervals (e.g., every 0.5, 1, 1.5 degrees) based on the AZ/EL angle inputs.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.5.2 Power-Up Setup Configuration The RVP8 stores on disk an extensive set of configuration information. The purpose of these data is to define the exact configuration of the RVP8 upon startup. The setup information can be accessed and modified using either a local keyboard and monitor, or over the network.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.6 Support Utilities and Available Application Software The RVP8 system includes a complete set of tools for the calibration, alignment and configuration of the RVP8. These includes the following utilities: ascope- a comprehensive utility for manual signal processor control and data display of moments, times series and Doppler spectra. ascope includes a realistic signal simulator capable of producing both first and second trip targets.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.7 Open Architecture and Published API The RVP8 is largely software compatible with the RVP7, and uses the same published API opcode interface that has evolved over the years from the RVP5, RVP6, and RVP7 products. Driver code that has been written for the RVP7 can be easily adapted to the RVP8. The 16–bit I/O command protocols are identical, and the data formats are unchanged.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8 RVP8 Technical Specifications 1.8.1 IFD Digitizer Module Input Signals IF Received Signal: 50 , + 6.5 dBm max IF Magnetron Burst or COHO: 50 , +6.5 dBm max Optional Reference Clock: 2–60 MHz –10 to 0 dBm IF Ranges 6 to 16MHz, 20-34 MHz, 38-52 MHz, 56-70 MHz Linear Dynamic Range 90 to >100dB depending on pulsewidth/bandwidth filter A/D Conversion Resolution Sampling rate 33.5 to 39.5 MHz (selectable, standard is 35.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.2 RVP8/Rx PCI Card Pulse Repetition Frequency 50 Hz to 20 KHz +0.1%, continuously selectable. IF Band Pass Filter Programmable Digital FIR with software selectable bandwidth. Built-in filter design software with graphical user interface. Impulse Response Up to 3024 FIR filter taps, corresponding to approximately 84 sec impulse response length for 36 MHz IF samples.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.3 RVP8/Tx PCI Card Analog Waveform Applications Digitally synthesized IF transmit waveform for pulse compression, frequency agility, and phase modulation applications. Master clock or COHO signal to the radar; can be phase locked or free running, arbitrary frequency. Analog Output Waveform Characteristics Two independent, digitally synthesized, analog output waveforms (BNC).
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.4 SIGMET I/O-62 PCI Card Short format PCI card with 62-position “D” connector. Multiple cards may be installed. Includes D/A, A/D, discrete inputs and outputs (TTL, wide range, RS422, etc.) See summary table below. I/O pin assignment mapping by softplane.conf file. Standard or custom remote backpanels available. ESD protection using Tranzorb silicon avalanche diode surge suppression and high-voltage tolerant components.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.5 RVP8 Standard Connector Panel Mounts on front or rear of standard 19” EIA rack Connects to I/O-62 via 1:1 62–pin 1.8–m cable (provided). Provides standard inputs and outputs required by most weather radars such as triggers, polarization control, pulse width control and antenna angles.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.6 RVP8 Processing Algorithms Input from Rx Board 16–bit I/Q samples Optional dual-channel I/Q samples (e.g., for polarization systems or dual frequency systems) IQ Signal Correction Options Amplitude jitter correction based on running average of transmit power from burst pulse.
RVP8 User’s Manual May 2003 Introduction and Specifications V Mean radial velocity 8 or 16 bits W Spectrum width 8 or 16 bits I/Q Time series 16 bits each per sample FFT Doppler Spectrum output option in FFT mode 16 bits per component Optional: 8 or 16 bits ZDR, PHIDP, RHOHV, LDR, RHO Data Quality Thresholds Signal–to–noise ratio signals. (SNR) Used to reject bins having weak Typically applied to dBZ. Signal quality index (non–Doppler) signals.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.7 RVP8 Input/Output Summary Digital IF Serial Stream Input On fiber optic cable from IFD for signal and burst sample. 16–bits @ 36 MHz (nominal). Ethernet or SCSI-2 Input/Output from Host Computer Data output of calibrated dBZ, V and W during normal operation. Diagnostic output of I and Q or FFT Doppler spectrum. Signal processor configuration and verification read–back is performed via the SCSI or Ethernet interface.
RVP8 User’s Manual May 2003 Introduction and Specifications 1.8.8 Physical and Environmental Characteristics Packaging Motherboard Configuration 4U rackmount with 6 PCI slots Single Board Computer Configuration 4u rackmount with 14 PCI slots Custom PC configurations available or packaged by customer. Dimensions of standard 4U chassis 43.2 wide x 43.2 long x 17.8 cm high 17 wide x 17 long x 7.00 inch high Dimensions IF Digitizer 2.5 wide x 10.9 long x 23.6 cm high 1 wide x 4.
RVP8 User’s Manual May 2003 Hardware Installation 2.4.2 Example Hookup to a MITEQ “MFS-xxx” STALO The electrical interface for this STALO uses a 25-pin “D” connector with the following pin assignments GROUND on pins 1 and 2. Four BCD digits of 1KHz, 10KHz, 100KHz, and 1MHz frequency steps, using Pins <25:22>, <21:18>, <17:14>, <13:10>. Seven binary bits of representing 10MHz steps, Bits<0:6> on Pins<9:3>. First configure the IFD pins themselves.
RVP8 User’s Manual May 2003 Hardware Installation 2.5 RVP8 Custom Interfaces This section describes some additional points of interface to the RVP8. These hookups are less conventional than the “standard” interfaces described earlier in this chapter, but they sometimes can supply exactly what is needed in exactly the right place. For the most part, these custom interfaces are merely taps into existing internal signals that would not normally be seen by the user. 2.5.
RVP8 User’s Manual May 2003 Hardware Installation The uplink signal, shown in Figure 2–5, is periodic at the radar pulse repetition frequency, and conveys two distinct types of information to the IFD. The signal is normally low most of the time (to minimize driver and termination power), but begins a transition sequence at the beginning of each transmitted pulse. Figure 2–5: Timing Diagram of the IFD Coax Uplink burst s s s s s 1 2 3 4 5 6 7 8 9 10...
RVP8 User’s Manual May 2003 Hardware Installation The period s of the serial data is (64 f aq) , where f aq is the acquisition clock frequency given in the Mc section of the RVP8 setup menu. For the default clock frequency of 35.975MHz, the period of the serial data will be 1.779µsec. The logic that is receiving the serial data should first locate the center of the first data bit at (0.5 s) past the falling edge at the end of the burst window.
RVP8 User’s Manual May 2003 Hardware Installation 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | | | | | | | | | | | | | | | | | | Command | Data | CMD/DATA |_______________|_______________________________________________| Commands #1, #2, and #3 control the 25 output pin levels of the DAFC board. These transmissions may be interspersed with the PLL-16 format in systems that require both clock locking and AFC, e.g., a dual-receiver magnetron system using a digitally synthesized COHO.
RVP8 User’s Manual May 2003 Hardware Installation to run the cable over distances as great as ten meters. Please see the RxNet7 User’s Manual for full details, as this is the recommended approach for driving the (I,Q) data out to an external device. If the RVP8’s internal TTL signals are to be used directly, the physical connections must be made in such a way that no more than 12cm of additional wire length is added at the backplane.
RVP8 User’s Manual May 2003 Hardware Installation 01 This is the final pulse of a collection of pulses that will contribute to the next processed ray. The 3-bit “Bank” field tells the major classification of the pulse. 000 001 010 111 Normal pulse Low PRF pulse during Dual-PRF mode Blanked transmitter version of a normal pulse Pulse used for receiver noise measurement (SNOISE Command) The 3-bit “Waveform” field indicates the minor classification of the pulse.
RVP8 User’s Manual May 2003 Hardware Installation 2.4.2 Example Hookup to a MITEQ “MFS-xxx” STALO The electrical interface for this STALO uses a 25-pin “D” connector with the following pin assignments GROUND on pins 1 and 2. Four BCD digits of 1KHz, 10KHz, 100KHz, and 1MHz frequency steps, using Pins <25:22>, <21:18>, <17:14>, <13:10>. Seven binary bits of representing 10MHz steps, Bits<0:6> on Pins<9:3>. First configure the IFD pins themselves.
RVP8 User’s Manual May 2003 Hardware Installation 2.5 RVP8 Custom Interfaces This section describes some additional points of interface to the RVP8. These hookups are less conventional than the “standard” interfaces described earlier in this chapter, but they sometimes can supply exactly what is needed in exactly the right place. For the most part, these custom interfaces are merely taps into existing internal signals that would not normally be seen by the user. 2.5.
RVP8 User’s Manual May 2003 Hardware Installation The uplink signal, shown in Figure 2–5, is periodic at the radar pulse repetition frequency, and conveys two distinct types of information to the IFD. The signal is normally low most of the time (to minimize driver and termination power), but begins a transition sequence at the beginning of each transmitted pulse. Figure 2–5: Timing Diagram of the IFD Coax Uplink burst s s s s s 1 2 3 4 5 6 7 8 9 10...
RVP8 User’s Manual May 2003 Hardware Installation The period s of the serial data is (64 f aq) , where f aq is the acquisition clock frequency given in the Mc section of the RVP8 setup menu. For the default clock frequency of 35.975MHz, the period of the serial data will be 1.779µsec. The logic that is receiving the serial data should first locate the center of the first data bit at (0.5 s) past the falling edge at the end of the burst window.
RVP8 User’s Manual May 2003 Hardware Installation 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | | | | | | | | | | | | | | | | | | Command | Data | CMD/DATA |_______________|_______________________________________________| Commands #1, #2, and #3 control the 25 output pin levels of the DAFC board. These transmissions may be interspersed with the PLL-16 format in systems that require both clock locking and AFC, e.g., a dual-receiver magnetron system using a digitally synthesized COHO.
RVP8 User’s Manual May 2003 Hardware Installation to run the cable over distances as great as ten meters. Please see the RxNet7 User’s Manual for full details, as this is the recommended approach for driving the (I,Q) data out to an external device. If the RVP8’s internal TTL signals are to be used directly, the physical connections must be made in such a way that no more than 12cm of additional wire length is added at the backplane.
RVP8 User’s Manual May 2003 Hardware Installation 01 This is the final pulse of a collection of pulses that will contribute to the next processed ray. The 3-bit “Bank” field tells the major classification of the pulse. 000 001 010 111 Normal pulse Low PRF pulse during Dual-PRF mode Blanked transmitter version of a normal pulse Pulse used for receiver noise measurement (SNOISE Command) The 3-bit “Waveform” field indicates the minor classification of the pulse.
RVP8 User’s Manual May 2003 Hardware Installation 2.4.2 Example Hookup to a MITEQ “MFS-xxx” STALO The electrical interface for this STALO uses a 25-pin “D” connector with the following pin assignments GROUND on pins 1 and 2. Four BCD digits of 1KHz, 10KHz, 100KHz, and 1MHz frequency steps, using Pins <25:22>, <21:18>, <17:14>, <13:10>. Seven binary bits of representing 10MHz steps, Bits<0:6> on Pins<9:3>. First configure the IFD pins themselves.
RVP8 User’s Manual May 2003 Hardware Installation 2.5 RVP8 Custom Interfaces This section describes some additional points of interface to the RVP8. These hookups are less conventional than the “standard” interfaces described earlier in this chapter, but they sometimes can supply exactly what is needed in exactly the right place. For the most part, these custom interfaces are merely taps into existing internal signals that would not normally be seen by the user. 2.5.
RVP8 User’s Manual May 2003 Hardware Installation The uplink signal, shown in Figure 2–5, is periodic at the radar pulse repetition frequency, and conveys two distinct types of information to the IFD. The signal is normally low most of the time (to minimize driver and termination power), but begins a transition sequence at the beginning of each transmitted pulse. Figure 2–5: Timing Diagram of the IFD Coax Uplink burst s s s s s 1 2 3 4 5 6 7 8 9 10...
RVP8 User’s Manual May 2003 Hardware Installation The period s of the serial data is (64 f aq) , where f aq is the acquisition clock frequency given in the Mc section of the RVP8 setup menu. For the default clock frequency of 35.975MHz, the period of the serial data will be 1.779µsec. The logic that is receiving the serial data should first locate the center of the first data bit at (0.5 s) past the falling edge at the end of the burst window.
RVP8 User’s Manual May 2003 Hardware Installation 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | | | | | | | | | | | | | | | | | | Command | Data | CMD/DATA |_______________|_______________________________________________| Commands #1, #2, and #3 control the 25 output pin levels of the DAFC board. These transmissions may be interspersed with the PLL-16 format in systems that require both clock locking and AFC, e.g., a dual-receiver magnetron system using a digitally synthesized COHO.
RVP8 User’s Manual May 2003 Hardware Installation to run the cable over distances as great as ten meters. Please see the RxNet7 User’s Manual for full details, as this is the recommended approach for driving the (I,Q) data out to an external device. If the RVP8’s internal TTL signals are to be used directly, the physical connections must be made in such a way that no more than 12cm of additional wire length is added at the backplane.
RVP8 User’s Manual May 2003 Hardware Installation 01 This is the final pulse of a collection of pulses that will contribute to the next processed ray. The 3-bit “Bank” field tells the major classification of the pulse. 000 001 010 111 Normal pulse Low PRF pulse during Dual-PRF mode Blanked transmitter version of a normal pulse Pulse used for receiver noise measurement (SNOISE Command) The 3-bit “Waveform” field indicates the minor classification of the pulse.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) 3. TTY Nonvolatile Setups (draft) The RVP8 provides an interactive setup menu that can be accessed either from a serial TTY, or from the host computer interface. Most of the RVP8’s operating parameters can be viewed and modified with this menu, and the settings can be saved in non-volatile RAM so that they take effect immediately on power-up. This permits custom trigger patterns, pulsewidth control, matched FIR filter specs, PRF, etc.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) From the command prompt, typing “help” or “?” gives the following list of available commands.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) number (if it is not zero) in the printout of the ”V” command. Likewise, the minor release number of the code that last saved the nonvolatile RAM is also shown. This is an improvement over having to check the date of the code to determine which minor release was running.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Values were last saved using ROM version V14 This line tells which version of RVP8 code was the last to write into the non-volatile RAM. It is printed only if that last version was different from the ROM version that is currently running. The information is included so that a “smart upgrade” can often be done, i.e., values that did not exist in the prior release can be filled in with a guess that is better than merely taking the factory default.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) 0x00400000 : Internal tests failed on some slave 0x00800000 : Trigger Generator RAM and addressing 0x01000000 : Excessive coax/fiber round trip jitter 0x02000000 : No sync found in round trip test 0x04000000 : Internal error in compile/link Coax/Fiber/Pipeline Delay: 0.624 usec (Stdev: 0.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) RVP8> ~ IFD Burst/IF Inputs are: SWAPPED RVP8> ~ IFD Burst/IF Inputs are: NORMAL The selection remains in effect for the duration of the setup session, but then returns to NORMAL upon exiting the TTY monitor. The “~” command is very handy because it allows the Pb, Pr, and Ps plotting commands to easily run with one input or the other. Here are two examples of how this might be useful.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) 3.2 Host Computer I/O Debugging The RVP8 supports two very powerful monitoring functions that are helpful in debugging the I/O interface to the host computer. One examines the physical layer of the interface, i.e., the electrical handshake and data lines themselves. The other examines the application layer, i.e., the 16-bit opcodes and data that define the RVP8’s application programming interface. 3.2.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) generated by this option, all other RTM selections are disabled whenever host computer I/O is being monitored. Also, those other RTM selections would interfere with the multi-line formatting of the I/O text. The TTY printout shows incoming opcodes called out by name, and subsequent input and output words formatted into a table. The data are printed in Hex, twelve words per line, and include a word offset (origin zero) at the start of each line.
RVP8 User’s Manual April 2003 Opcode 0x0010 (SETPWF) Input Words 0: 2EE0 Opcode 0x0001 (LRMSK) Input Words 0: 0001 0000 0000 0000 12: ... 504: 0000 0000 0000 0000 TTY Nonvolatile Setups (draft) 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 This RTM option to monitor computer I/O is automatically disabled at powerup, and therefore can not be saved permanently.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) 3.3 View/Modify Dialogs The M command may be used to view, and optionally to modify, all of the current settings. The current value of each parameter is printed on the screen, and the TTY pauses for input at the end of the line. Pressing Return advances to the next parameter, leaving the present one unchanged. You may also type U to move back up in the list, and Q to exit from the list at any time.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Dual–LNA/Rcvr single–channel switched mode: NO For dual-polarization single-receiver systems, this question decides whether you have a single LNA and IF-Amplifier that switches between H&V (the typical case); or two separate receivers, each hard wired to H and V, with switching performed after the IF amplifiers. The question affects how noise levels are measured and applied to the data. Synthesize LOG video output waveform: YES Upper 100.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) three available slave DSPs would be reduced to two; whereas on a dual-board system, the 13 available DSPs would be reduced to 12. Obviously, the percentage penalty is less in a larger system. The second question decides how the overall dynamic range of the receiver will fit into the 12-bit unipolar output voltage span of the DAC that produces the LOG Video waveform.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) unique to the RVP8 can be handled by the local TTY and Scope setups, thus making no demands on the user’s system code for support. Answer this question “YES” for maximum compatibility with old driver software. However, if you are running IRIS version 6.11 or higher, then answer “NO” to enable using new RVP8 features as they are developed. The RVP8 returns a version number of 35 when the processor is running in RVP7 compatibility mode.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Unfold Velocity (Vh–Vl) – 0:Never, 1:User, 2:Always : 0 This question allows you to choose whether the RVP8 will unfold velocities using a simple (Vhigh – Vlow ) algorithm, rather than the standard algorithm described in Section 5.6. Bit-11 of SOPPRM word #10 is the host computer’s interface to this function when the “1:User” case is selected (See Section 6.3). Note: This setup question is included for research customers only.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Limits: 10 to 500 pulses IFD built–in noise dither source: –57.0dBm This question will only appear if the processor is attached to a Rev.D RVP8/IFD that includes an out-of-band noise generator to supply dither power for the A/D converters. The available power levels are { Off, –57dBm, –37dBm, –32dBm, –27dBm, –22dBm, –19dBm }. The closest available level to your typed-in value will be used.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Polarization Params – Filtered:YES NoiseCorrected:YES PhiDP – Negate: NO , Offset:0.0 deg KDP – Length: 5.00 km T/Z/V/W computed from: H–Xmt:YES V–Xmt:YES T/Z/V/W computed from: Co–Rcv:YES Cx–Rcv:NO The first question decides whether all polarization parameters will be computed from filtered or unfiltered data, and whether noise correction will be applied to the power measurements.
RVP8 User’s Manual April 2003 Spectral Clutter Filters –––––––––––––––––––––––– Filter #1 – Type:0(Fixed) Filter #2 – Type:0(Fixed) Filter #3 – Type:0(Fixed) Filter #4 – Type:0(Fixed) Filter #5 – Type:1(Variable) Filter #6 – Type:1(Variable) Filter #7 – Type:1(Variable) TTY Nonvolatile Setups (draft) Width:1 Width:2 Width:3 Width:4 Width:1 Width:2 Width:3 EdgePts:2 EdgePts:2 EdgePts:3 EdgePts:3 EdgePts:2 EdgePts:2 EdgePts:3 Hunt:2 Hunt:2 Hunt:3 These questions define the heuristic clutter filters that
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) For example, if we observe 20dB of total power above receiver noise, and then apply a clutter correction of 19dB, we are left with an apparent weather signal power of +1dB above noise. However, the uncertainty of this +1dB residual signal is much greater than that of a pure weather target at the same +1dB signal level. The “Residual Clutter LOG Noise Margin” allows you to increase the LOG noise threshold in response to increasing clutter power.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Answer the second sub-question according to whether the radar transmitter is directly fired by the the external pretrigger, rather than by one of the RVP8’s trigger outputs. In other words, answer “YES” if the transmitter would continue running fine even if the RVP8 TRIGIN signal were removed. This information is used by the ”L” and ”R” subcommands of the ”Pb” plotting command, i.e.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) This question permits the state of the triggers during noise measurements to be consistent and known, regardless of whether the antenna happens to be within a blanked sector; and you have the additional flexibility of choosing blanked noise triggers all the time.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Merge triggers to create composite waveforms: Merge Trigger #1 into : #1: #2: #3: #4: Merge Trigger #2 into : #1: #2: #3: #4: Merge Trigger #3 into : #1:Y #2: #3: #4: Merge Trigger #4 into : #1: #2:Y #3: #4: Merge Trigger #5 into : #1: #2:Y #3: #4: Merge Trigger #6 into : #1: #2: #3: #4: YES #5: #5: #5: #5: #5: #5: #6: #6: #6: #6: #6: #6: These questions allow you to merge the six user triggers together; resulting in trigger patterns that can
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) between every pair of transmitted pulses, and remains correctly positioned regardless of changes in the PRF Enter this multiplier as “0” if you do not wish to use this term, and it will be omitted entirely from the printout.. In the above example, Trigger #2 is a 10.0 sec active-high pulse whose leading edge occurs precisely halfway between the zero-range of every pair of pulses. Likewise, Trigger #6 is a 2.
RVP8 User’s Manual April 2003 Maximum number of Pulses/Sec: Maximum instantaneous ’PRF’ : TTY Nonvolatile Setups (draft) 2000.0 2000.0 (/Sec) These are the PRF protection limits for this pulsewidth. The wording of the “Maximum number of Pulses/Sec” question serves as a reminder that the number shown is not only an upper bound on the PRF, but also a duty cycle limit when DPRT mode is enabled.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) It should be at least as long as the transmitted pulsewidth. If it were shorter, then some of the returned energy would be thrown away when “I” and “Q” are computed at each bin. The SNR would be reduced as a result. It should be at least as long as the range bin spacing. The goal here is to choose the longest filter that retains statistical independence among successive bins.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Output control 4–bit pattern: 0001 These are the hardware control bits for this pulsewidth. The bits are the 4-bit binary pattern that is output on PWBW0:3 Bit Limits: 0 to 15 (input must be typed in decimal) Current noise level: –75.00 dBm Powerup noise level: –75.00 dBm –or– Current noise levels – PriRx: –75.00 dBm, SecRx: –75.00 dBm Powerup noise levels – PriRx: –75.00 dBm, SecRx: –75.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) safety zones on either side of integer multiples of half the RVP8/IFD’s 36MHz sampling frequency. The value entered here implicitly defines the band, and hence, the boundaries of the 18MHz window in which the IF is assumed to fall. Limits: 22 to 68 MHz. Primary Receiver Intermediate Frequency: 30.0000 MHz Secondary Receiver Intermediate Frequency: 24.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) choice. The Blackman window is useful if you are trying to see plotted spectral components that are more than 40dB below the strongest signal present. It is especially useful in the “Pr” plot when a long span of data are available. FIR filters designed with the Blackman window will have greater stopband attenuation than those designed with the Hamming window, but the wider main lobe may be undesirable.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) The following rather long list of questions will appear only if AFC and MFC functions have been enabled. AFC Servo– 0:DC Coupled, 1:Motor/Integrator : 0 The AFC servo loop can be configured to operate with an external Motor/Integrator frequency controller, rather than the usual direct-coupled FM control.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) arbitrary units ranging from –100 to +100 corresponding to the complete span of the D/A converter. Since the D–Unit corresponds in a natural way to a percentage scale, the shorter “%” symbol is sometimes used. AFC feedback will be applied in proportion to the frequency error that the algorithm is attempting to correct.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) backpanel RS232 outputs, or sent on the uplink as a value to be received by the RVP8/IFD and converted to an analog voltage. Yet another option is for the bits to be sent on the uplink and received by the RVP8/DAFC board, which supports arbitrary remapping of its output pins.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) The voltage range of the “I” and “Q” outputs is approximately 1 Volt, and is not adjustable. When AFC/MFC is mirrored on these lines, you will probably need to add an external Op-Amp circuit to adjust the voltage span and offset to match your RF components. We also recommend that you add significant low-pass filtering (cutoff at 3Hz) to remove any power line noise or crosstalk that may be originating within the RVP8/Main chassis.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) The automatic hunt for the burst pulse will always run at least once whenever the feature is enabled. The automatic hunting ceases, however, as soon as any activity is detected from the host computer. Only use this feature on radars with a serious drift problem in their burst pulse timing. Simulate burst pulse samples: NO The RVP8 can simulate a one microsecond envelope of burst samples.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) A zero D-Unit output will always be produced whenever AFC is locked. When AFC is tracking, the output drive will always be at least 15 D-Units. This minimum non-zero drive should be set to the sustaining drive level of the motor actuator, i.e., the minimum drive that actually keeps the motor turning. When AFC is tracking, the output drive will never exceed 90 D-Units.
RVP8 User’s Manual April 2003 TTY Nonvolatile Setups (draft) Noise level for simulated data: –50.0 dB This is the noise level that is assumed when simulated “I” and “Q” data are injected into the RVP8 via the LSIMUL command. The noise level is measured relative to the power of a full-scale complex (I,Q) sinusoid, and matches the levels shown on the slide pots of the ASCOPE digital signal simulator.
RVP8 User’s Manual April 2003 10–1F: 20–2F: 30–3F: 40–4F: 50–5F: 60–6F: 70–7F: 80–8F: 90–9F: A0–AF: B0–BF: C0–CF: D0–DF: E0–EF: F0–FF: – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – TTY Nonvolatile Setups (draft) – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
RVP8 User’s Manual April 2003 MidSamp Plot–Assisted Setups Also indicates the RMS power within the passband of the FIR filter, but using only the raw IF samples in the exact center of the chosen interval. The computation of “Total Power” is performed using the same subset of central IF samples that are used to compute “Filtered Power”.
RVP8 User’s Manual May 2003 Hardware Installation 2. Hardware Installation 2.1 Overview and Input Power Requirements This chapter describes how to install the RVP8 hardware. Topics include mechanical installation and siting, electrical specifications of the interface signals, system-level considerations and the standard connector panel that is provided. There are three major modules supplied with the RVP8. These are: IFD (IF Digitizer) Typically mounted in the radar receiver cabinet.
RVP8 User’s Manual May 2003 Hardware Installation 2.2 IFD IF Digitizer Module Installation 2.2.1 IFD Introduction The IFD IF digitizer is housed in an electrically sealed solid metal enclosure to achieve good immunity to external electrical noise. The internal circuitry has been designed to minimize the number of digital components, and it is carefully grounded and shielded to make the cleanest possible samples of the input IF signal.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.2 IFD Revision History There have been several versions and evolutions of the IFD. Table 2–1 summarizes the differences among all of the versions that have been manufactured so far. This document covers only the 14–bit units although the previous generation 12–bit units are compatible with the RVP8 as well. Table 2–1: Differences Among Versions of the IFD Rev.B Rev.C Rev.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.3 IFD Power, Size and Physical Mounting Considerations The IFD is a compact sealed module with dimensions 23.6 x 10.9 x 3.0 cm. (9.3 x 4.3 x 1.2 in). The unit is designed to be mounted on edge such that the 23.6 x 3.0 cm. surface is flush on the back of the receiver cabinet with 10.9 cm. protrusion into the cabinet. The unit is typically placed where a traditional LOG receiver would be installed.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.4 IFD I/O Summary The connectors on the IFD are labelled as shown in the table below. The connections to the IFD are as follows: Table 2–2: IFD I/O Connections IFD I/O Summary Connector Label Style Description Reference J1 IFĆIN SMA IF signal from LNA/mixer; via an antiĆaliasing filter 2.2.6 centered at IF (supplied by SIGMET). 50W, + 6.5 dBm 2.2.7 max 2.2.8 2.2.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.5 IFD Adjustments and Test/Status Indicators The IFD is packaged in a tight metal enclosure for maximum noise immunity. The only adjustments on the module are the internal gain and offset pots that adjust the AFC analog output. Two switches on the unit provide standalone test features to verify the proper functioning of the IFD and to assist with setting the voltage span of the AFC DAC.
RVP8 User’s Manual May 2003 Hardware Installation The internal jumper settings are summarized in the following table. Please also refer to Sections 2.2.10 and 2.2.11 for more information on setting up the AFC or External Clock options. Table 2–5: IFD Internal Jumper Settings Rev.B Rev.C JP1 Rev.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.6 IFD Input A/D Saturation Levels There are two analog signals that must be supplied to the IFD: S IF receiver signal S IF Tx Sample (Burst Pulse) for magnetron, or COHO reference for klystron. Both of these inputs are on SMA connectors. The IF signal should be driven by the front-end mixer/LNA/IF-Amp. components, similar to the way that a LOG receiver would normally be installed.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.7 IF Bandwidth and Dynamic Range The RVP8 performs best with a wide bandwidth IF input signal. This is because a wideband signal can be made free of phase distortions within the (relatively narrow) matched passband of the received signal. The RVP8 uses an external analog anti-aliasing filter at each of its IF and Burst inputs. The purpose of these filters is to block frequencies that would otherwise alias into the matched filter passband.
RVP8 User’s Manual May 2003 Hardware Installation Thus, the overall dynamic range at 1MHz bandwidth (approx. 1 msec transmit pulse) is 88+6+4 = 98dB. For a 0.5 msec pulse the dynamic range would be reduced to 95dB; but it would increase to 101dB for a 2.0 msec pulse. An actual calibration curve demonstrating this performance is shown in Figure 2–1, for which the RVP8’s digital bandwidth was set to 0.53MHz and external signal generator steps of 1dB were used over the full operating range.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.8 IF Gain and System Performance The previous discussion was concerned with measuring the dynamic range of a stand-alone IFD. We will now examine how the unit performs in the context of a complete radar receiver. We assume that an LNA/Mixer has already been selected that offers an appropriate balance between price and noise figure.
RVP8 User’s Manual May 2003 Hardware Installation noise power of the IFD over some bandwidth. Similarly, let N LNA represent the LNA/Mixer thermal noise power over that same bandwidth, and after amplification by all RF and IF stages. Note that N IFD is primarily due to the quantization noise that is introduced by the A/D converter, whereas N LNA has its origins in the fundamental thermal noise of the receiving system.
RVP8 User’s Manual May 2003 Hardware Installation 3. Thus, the RF/IF gain must bring the front-end thermal noise at –112dBm/MHz up to a level that is 6.1dB higher than the IFD noise density of –82dBm/MHz. The gain is therefore (–82dBm/MHz + 6dB) – (–112dBm/MHz) = 36dB. Note that this gain does not depend on bandwidth, and therefore will be correct for all pulsewidth/bandwidth combinations. 4. The dynamic range for the complete system at 0.5MHz bandwidth may now be calculated as 101dB – 7dB = 94dB. 5.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.10 IFD Analog AFC Output Voltage (Optional) An analog AFC voltage is produced by a 16-bit DAC whose output limits are –10V to +10V. Gain and Offset potentiometers on the IFD module set the actual operating span within these limits. Use the switch settings described below to force the low, center, and high voltages to be output, and then adjust the two potentiometers so that the desired voltage span is achieved.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.11 IFD Reference Clock Input (Optional) When the RVP8 is used in a klystron system, or in any type of synchronous radar, the radar COHO is supplied to the IFD so that the processor can digitally lock to it. The COHO phase is measured at the beginning of each transmitted pulse, and is used to lock the subsequent (I,Q) data for that pulse. The COHO phase is measured relative to the IFD’s own internal stable sampling clock, which is nominally 35.975MHz.
RVP8 User’s Manual May 2003 Hardware Installation This falls quite short of the usual expectations of a synchronous radar system in which clutter rejection of 55–60dB should be attainable. The solution to either of the above concerns is to provide some means for the IFD’s internal sampling clock to be phase locked to the radar system.
RVP8 User’s Manual May 2003 Hardware Installation 2.2.12 Coax Uplink and Fiber Downlink There are two cable links between the IFD module and the RVP8 Main Chassis: S Copper coax cable uplink from the RVP8/Rx board. Provides timing information for the burst pulse window, and 16-bit data for setting the AFC output level. S Optical fiber downlink to the RVP8/Rx board. The receiver and burst pulse data samples are encoded into a 540MHz serial stream.
RVP8 User’s Manual May 2003 Hardware Installation 2.3 RVP8 Chassis 2.3.1 RVP8 Chassis Overview The RVP8 main chassis can assume a variety of forms depending on the customer requirements. Appendix B describes a standard SIGMET system. A typical unit supplied by SIGMET contains at least the following: S A dual CPU on either motherboard or SBC in a passive PCI backplane S RVP8/Rx Card S I/O-62 Card and Connector Panel The system is also shipped with an integrated hard disk drive (HDD), 1.
RVP8 User’s Manual May 2003 Hardware Installation 2.3.3 Main Chassis Direct Connections The direct connections to the RVP8 chassis are made either to the back of the unit to PCI cards (e.g., left) or to the remote connector panel. The direct connections are summarized in the table below.
RVP8 User’s Manual May 2003 Hardware Installation 2.3.4 Connector Panel I/O Connections Most of the connections between the radar and the RVP8 are made using the RVP8 Connector Panel which connects to the I/O-62 by 1.8m (6 foot) cable. The panel is usually mounted on the front or the back of the same 19” EIA rack that contains the RVP8 chassis. The I/O-62 cable may be plugged into either the front or the back of the connector panel to optimize the cable run. The table in Section 1.8.
RVP8 User’s Manual May 2003 Hardware Installation If larger current and voltage loads are required, then the connector panel relays can be used to switch external relays provided by the customer. Another alternative is to use the additional 4, 12V relay signals (up to 200mA) that are also supported on this connector. Hazard: External relays must be equipped with proper diode protection against back-EMF or damage to the I/O-62 and or the connector panel might result.
RVP8 User’s Manual May 2003 Hardware Installation J15-18: TRIG1-4- Output triggers The waveforms appearing on the four trigger outputs are programmed by the user to meet the radar’s exact timing needs. These correspond to the trigger generators TGEN1, TGEN2, TGEN3 and TGEN4. More triggers can be configured on the “SPARE” connectors if they are required. All lines may be setup and used independently and can contain, for example, pre-trigger pulses, calibration gates, range strobes, scope triggers, etc.
RVP8 User’s Manual May 2003 Hardware Installation 2.3.5 Power-Up Details (Alan) Draft WARNING: The Main Chassis redundant power supplies are NOT auto-ranging like the IFD. These are factory configured for the expected voltage, but should be VERIFIED by the customer before power is applied to the system. Ideally, the RVP8 main chassis should be powered-up after or at the same time as the IFD. This allows the diagnostic tests on the main board to run properly and exercise both components of the system.
RVP8 User’s Manual May 2003 Hardware Installation 2.3.6 Socket Interface The RVP8 as shipped is configured to listen on a network port. It is ready to interface to a host computer via the network using a program called DspExport. It is also ready to run some commands on the RVP8 itself. The RVP8 comes with some built–in SIGMET supplied utilities such as setup, dspx and ascope. These utilities are described in the IRIS Utilities Manual.
RVP8 User’s Manual May 2003 Hardware Installation Your program can choose to evaluate or ignore any of these keywords. “CanCompress=1” indicates that the DspExport computer supports compression. The host computer can then choose to use compression if it wants to. DspExport supports only the 5 commands discussed individually below: Read command (READ) Example: “READ|100” means read 100 bytes from the RVP8. Since the RVP8 interface is a 16-bit word interface, these read sizes should always be even.
RVP8 User’s Manual May 2003 Hardware Installation Notes on migrating from the SCSI interface Here are suggestions for customers who are converting an existing program which used a SCSI interface to the RVP7 to the socket interface to the RVP8. First take a look at our source code which handles either SCSI or socket. In OpenSocket.c you can see the code which replaces the SCSI device open call. The SCSI inquiry command is replaced by reading the string returned after the socket is opened.
RVP8 User’s Manual May 2003 Hardware Installation 2.4 Digital AFC Module (DAFC) The DAFC is a small self-contained circuit board which can passively “eavesdrop” on the RVP8’s serial uplink transmissions. Its purpose is to generate a set of digital AFC control lines that could be applied, for example, to a custom STALO frequency synthesizer. A full size (3”x3.75”) assembly diagram of the board is shown in Figure 2–3.
RVP8 User’s Manual May 2003 Hardware Installation assure a valid TTL low level of 0.6V max. requires that the STALO inputs be pulled up to +5 with nothing less than (approx.) 1.2KW. Put another way, the low level input current of the receiving device should not exceed 4.5mA. Most STALOs that we have seen use 5-20KW pull-up resistors, so this should not be a problem. All twenty five pins of the “D” connector are wired identically on the DAFC board, i.e.
RVP8 User’s Manual May 2003 Hardware Installation The DAFC board runs off of a single +5V power supply which can be applied either from the STALO through the “D” connector, or externally through the terminal block. There are also provisions for supplying +24V (approx.) between the terminal block and the “D” connector, which is handy for cabling power to a STALO that requires the second voltage. Two green LEDs indicate the presence of +5V and +24V.
RVP8 User’s Manual May 2003 Hardware Installation Table 2–8: Pinout for the CTI “MVSR-xxx” STALO Ribbon Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 “D” Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 Function Ground +5V +24V Alarm –– Bit–2 Bit–3 Bit–11 Bit–9 Bit–8 Bit–7 Bit–12 Inhb Ribbon Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 “D” Pin 14 15 16 17 18 19 20 21 22 23 24 25 –– Function –– –– –– –– Bit–0 Bit–1 Bit–10 Bit–4 Bit–5 Bit–6 Ground Bit–13 –– First configure the IFD pins themselves.
RVP8 User’s Manual May 2003 Hardware Installation 2.4.2 Example Hookup to a MITEQ “MFS-xxx” STALO The electrical interface for this STALO uses a 25-pin “D” connector with the following pin assignments S GROUND on pins 1 and 2. S Four BCD digits of 1KHz, 10KHz, 100KHz, and 1MHz frequency steps, using Pins <25:22>, <21:18>, <17:14>, <13:10>. S Seven binary bits of representing 10MHz steps, Bits<0:6> on Pins<9:3>. First configure the IFD pins themselves.
RVP8 User’s Manual May 2003 Hardware Installation 2.5 RVP8 Custom Interfaces This section describes some additional points of interface to the RVP8. These hookups are less conventional than the “standard” interfaces described earlier in this chapter, but they sometimes can supply exactly what is needed in exactly the right place. For the most part, these custom interfaces are merely taps into existing internal signals that would not normally be seen by the user. 2.5.
RVP8 User’s Manual May 2003 Hardware Installation The uplink signal, shown in Figure 2–5, is periodic at the radar pulse repetition frequency, and conveys two distinct types of information to the IFD. The signal is normally low most of the time (to minimize driver and termination power), but begins a transition sequence at the beginning of each transmitted pulse. Figure 2–5: Timing Diagram of the IFD Coax Uplink t burst ts ts ts ts ts 1 2 3 4 5 6 7 8 9 10...
RVP8 User’s Manual May 2003 Hardware Installation The period t s of the serial data is (64ń f aq) , where f aq is the acquisition clock frequency given in the Mc section of the RVP8 setup menu. For the default clock frequency of 35.975MHz, the period of the serial data will be 1.779µsec. The logic that is receiving the serial data should first locate the center of the first data bit at (0.5 t s) past the falling edge at the end of the burst window.
RVP8 User’s Manual May 2003 Hardware Installation 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | | | | | | | | | | | | | | | | | | Command | Data | CMD/DATA |_______________|_______________________________________________| Commands #1, #2, and #3 control the 25 output pin levels of the DAFC board. These transmissions may be interspersed with the PLL-16 format in systems that require both clock locking and AFC, e.g., a dual-receiver magnetron system using a digitally synthesized COHO.
RVP8 User’s Manual May 2003 Hardware Installation to run the cable over distances as great as ten meters. Please see the RxNet7 User’s Manual for full details, as this is the recommended approach for driving the (I,Q) data out to an external device. If the RVP8’s internal TTL signals are to be used directly, the physical connections must be made in such a way that no more than 12cm of additional wire length is added at the backplane.
RVP8 User’s Manual May 2003 Hardware Installation 01 This is the final pulse of a collection of pulses that will contribute to the next processed ray. The 3-bit “Bank” field tells the major classification of the pulse. 000 001 010 111 Normal pulse Low PRF pulse during Dual-PRF mode Blanked transmitter version of a normal pulse Pulse used for receiver noise measurement (SNOISE Command) The 3-bit “Waveform” field indicates the minor classification of the pulse.