Intel® Wireless-AC 9560 / 9560NGW (Jefferson Peak) External Product Specification (EPS) April 2017 Revision 1.0 Intel Confidential Document Number: 567240–1.
Notice: This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information. INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
Contents 1 2 3 4 5 6 7 Introduction ................................................................................................................. 8 1.1 Key features ........................................................................................................ 8 1.2 Jefferson Peak module SKUs ................................................................................. 10 Product Architecture.............................................................................................
8 9 Dynamic Regulatory Solution ...................................................................................... 45 8.1 Overview ............................................................................................................ 45 Platform Design Guidelines......................................................................................... 46 9.1 Socket 1 key options for 2230 cards ...................................................................... 46 9.1.
Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table 5–3 5–4 5–5 5–6 5–7 5-8 6–1 6–2 6–3 7–1 7–2 7–3 7–4 7–5 7–6 9–1 9–2 9–3 Tx power per MCS (TBD) ...................................................................................32 Wi-Fi sensitivity ................................................................................................36 Wi-Fi throughput .......................................................................................
Revision History Revision Description Date 0.5 Initial release September 2016 1.0 Corrected errors in CNVio trace numbers on M.
Abbreviations Term Description CNVi Integrated connectivity solution CRF Companion RF chip/module of the CNVi SoC System on chip PCH Platform control hub Pulsar The integrated IP part of the CNVi JfP Jefferson Peak companion RF chip/module LTE Long-term evolution (a mobile phone standard) RGI Radio generic interface, between JfP and Pulsar BRI Bluetooth radio interface, between JfP and Pulsar Wi-Fi Wireless LAN BT Bluetooth OTP One-Time Programmable non-volatile memory LDO Low-Dro
Introduction 1 Introduction The Intel® Integrated Connectivity Wireless-AC 9560 (code name Jefferson Peak or JfP) is an M.2 connectivity RF companion module for notebooks, tablets, and PCs. When combined with the Intel SoC that supports Connectivity Integration (CNVi), it supports the following radio technologies: 802.11abgn+acR2 MIMO 2x2 Bluetooth® 5.
Introduction LTE Coex Real-Time and Non Real-Time, LTE filter (not supported by all SKUs, see SKU description below) Performance TX Burst, TCP packet reordering, MSIx for reduced multi-core CPU load vPro AMT 11.0 Miracast Smart SKU Dynamic Regulatory SKU enabling automatic channel map and output power changes depending on the regulations of the country where it is operating CNVi/Discrete auto-detect Supports auto-detection by the SoC and by BIOS Operating System Win8.
Introduction 1.2 Jefferson Peak module SKUs The Jefferson Peak module supports the HW SKUs listed in Table 1-2.
Product Architecture 2 Product Architecture 2.1 Integrated Connectivity concept 2.1.1 MAC-PHY split Integrated Connectivity (CNVi) is a new architecture for wireless connectivity devices. The concept of CNVi is to move a large part of the functional content of the connectivity chip from the radio chip into the Intel SoC. As a result, a large portion of the chip logic and memory resources is moved out of the radio chip while reducing the platform’s bill of material (BOM) size and cost.
Product Architecture 2.1.3 Swappable Companion RF/Discrete Companion RF (CRF) M.2 modules are swappable with discrete connectivity M.2 modules. The meaning of swappable in this context is that the design of the M.2 socket on the platform can allow using the same M.2 socket for both CNVi and discrete connectivity without the need to change the hardware configuration.
Product Architecture The Jefferson Peak M.2 module interfaces the platform and the SoC through a proprietary interface for CNVi. This interface connects between the JfP module and the SoC and between the JfP module and the platform. A high-level description of the interface is shown in Figure 2–2. Power supply The Jefferson peak module is powered by a 3.3V supply connected to the dedicated power pins on the M.2 module connector.
Electrical Specifications 3 Electrical Specifications This section provides information about the electrical specifications of the Jefferson Peak module. The specifications cover the module hardware interface signals. 3.1 2230 and 1216 form factor pinouts There are two pinout lists, one for the platform side, and one for the module side. Note that some signals are crossed (such as UART Rx on platform side is connected to TX on the module side).
Electrical Specifications Pin # Pin Name Platform Pinout Pin Name Module Pinout Direction w/respect to JfP Module JfP Voltage on Module Side 16 LED2# LED2# O OD 17 WGR_D0P WGR_D0P O CNVio PHY 18 GND LNA_EN 19 GND GND 20 UART WAKE# NC Connection on Platform/Usage BT LED CNVio bus RX lane 0 This a special purpose test pin of the JfP module. Should be connected to Ground on the platform. O 3.
Electrical Specifications Pin # Pin Name Platform Pinout Pin Name Module Pinout 40 CLINK DATA NC Direction w/respect to JfP Module JfP Voltage on Module Side Connection on Platform/Usage Not used by Jefferson Peak Optional CLINK interface for supporting discrete module 41 PERp0 NC PCIe PHY Not used by Jefferson Peak Shall be connected to PCIe for supporting discrete module 42 CLINK CLK NC Not used by Jefferson Peak Optional CLINK interface for supporting discrete module 43 PERn0 NC PCI
Electrical Specifications Pin # Pin Name Platform Pinout Pin Name Module Pinout Direction w/respect to JfP Module JfP Voltage on Module Side Connection on Platform/Usage Shall be connected to PCIe PCIe for supporting discrete module. 56 W_DISABLE1# W_DISABLE1# 57 GND GND 58 I2C DATA/ A4WP_I2C_DA TA 59 3.3 V JfP also supports 1.8 V electrical levels on this signal NC 1.8 V Not used by Jefferson Peak. WT_D1N WT_D1N CNVio PHY 60 I2C CLK/ A4WP_I2C_CL K NC 1.
Electrical Specifications Pin # Pin name Function when CNVi is used Function when Standard (discrete) M.
Electrical Specifications Pin # Pin name Function when CNVi is used Function when Standard (discrete) M.
Electrical Specifications Pin # Pin name Function when CNVi is used Function when Standard (discrete) M.
Electrical Specifications Pin # Pin name Function when CNVi is used Function when Standard (discrete) M.
Electrical Specifications Pin # Pin name Function when CNVi is used Function when Standard (discrete) M.
Electrical Specifications I/O type Symbol VOL Parameter Output Low Voltage Min 0 Max Unit 0.36 Io = 2mA Open Drain 1.8V FS_CR CLKREQ0 Notes Load = 64pF RPU = 1Kohm CIO IO Pin Capacitance 2 pF VIH Input High Voltage 1.26 2.1 V VIL Input Low Voltage -0.3 0.54 V RPU/PD Weak Pull-Up or PullDown 100 180 Kohm IIN Input Leakage Current 10 uA No Pulls VOH Output High Voltage 1.8 V Io = 2mA (Note 2) 1.62 Load = 20pF VOL Output Low Voltage 0 0.
Electrical Specifications NOTES: 1. I2C max speed will be 1MHz (Fast plus Mode). I2C SDA & SCL I/Os must comply with 120ns max rise/fall time. I/O are protected against back-bias up to 1.8V and can withstand I/O voltage when the power supply is off. 2. I/O are protected against back-bias up to 1.98V and can withstand I/O voltage when the power supply is off. 3. Input is 3.6V tolerant. I/O are protected against back-bias up to 3.6V and can withstand I/O voltage when the power supply is off. 4.
Electrical Specifications Table 3-5 M.2 power supply and ripple limits Platform Power Rail Requirements Power supply voltage range 3.3 V +/–0.165 V Power on rise time <10 msec Maximum ripple 200 mVPP, frequency 10–500 kHz Allowed power rail noise 300 mVpp 3.4.2 Platform state transitions Platform designers should carefully design the transition from platform on state to platform stand-by state and vice versa, so that the power supply will remain stable and have no glitches. 3.5 M.
Mechanical Specifications 4 Note: Mechanical Specifications The module’s mechanical specifications adhere to the PCIe_M.2_Electromechanical_Spec. 4.1 Weight Table 4-1 Weight Product SKU Size (mm × mm) Weight (g) Jefferson Peak 2230 22x30 TBD Jefferson Peak 1216 12x16 TBD 4.2 M.2 2230 mechanical specification This section describes the mechanical specification of Jefferson Peak 2230 modules. Figure 4–1 shows the dimensions for type 2230.
Mechanical Specifications Figure 4–2 Jefferson Peak M.2 2230 SKU antenna configuration 4.3 M.2 1216 mechanical specification This section describes the mechanical specification of Jefferson Peak 2230 modules. Figure 4–3 shows the dimensions for type 1216. Antenna connector configuration and functionality for this form factor is listed in Table 4-3 and shown in Figure 4–3. April 2017 Document Number: 567240–1.
Mechanical Specifications Figure 4–3 Jefferson Peak M.2 1216 SKU dimensions Intel® Wireless-AC 9560 (Jefferson Peak) External Product Specification (EPS) 28 Intel Confidential April 2017 Document Number: 567240–1.
Mechanical Specifications Antenna connector functional allocation for this form factor is defined as shown in Table 4-3 (note the functionality is vendor-defined according to the M.2 spec). Note: In Jefferson Peak 1216, antenna ANT2 is not present. Table 4-3 Type 1216 antenna connector functionality Antenna connector functionality Wi-Fi (Chain A) + BT ANT1 Wi-Fi (Chain B) ANT3 4.4 Z height Jefferson Peak supports S3 Z-height module (1.5 mm from module surface to the top of the shield). 4.5 M.
Performance 5 Performance 5.1 Power consumption 5.1.1 Wi-Fi power consumption Table 5–1 Wi-Fi power consumption Wi-Fi Power KPI JfP2 [mW] Unassociated 7.1 Idle associated 2.4GHz (consumer) DTIM=3 OOB 4 Idle associated 5.2GHz (enterprise) DTIM=1 OOB 4.8 Idle associated 2.4GHz (consumer) DTIM=3 benchmark BT disabled No scan 3.5 Idle associated 5.2GHz (enterprise) DTIM=1 benchmark BT disabled No scan 4.1 Web Browsing 2.4GHz (consumer) 13 Web Browsing 5.2GHz (enterprise) 15 VOIP 2.
Performance TpT – 11ac HB-80 Rx 11ac 675 NOTES: 1. BT in SW RF-KILL in all the tests 2. HB values refer to internal FE SKU 3. OS: Win10 5.1.2 BT power consumption Table 5–2 BT power consumption BT Power KPI JfP2 [mW] Target eSCO 33.69 MP3 playback BT A2DP 34.97 Continuous TX 10dBm 163.75 Continuous RX 111.02 HID BLE connected idle 13.35 BLE advertising 2.04 BLE scanning 3.74 Page scan 5.73 Page and inquiry scan 7.84 BR/EDR sniff 5.92 OPP Tx 100.04 OPP Rx 101.71 NOTES: 1.
Performance 5.2 Wi-Fi performance 5.2.1 Wi-Fi Tx power (TBD) Note: The content in this section is to be determined (TBD) in the next release. Table 5–3 describes the device’s actual output power in various rates and channels, taking into account both Tx power regulatory limits and IEEE mask and EVM performance (the minimum between these). This is a change from previous generations of EPS documents. Please note that the numbers in Table 5–3 are for the default Tx numbers.
Performance JfP (2230/1216) CH MCS AC–9560 Tx Power 2230 MS (dBm, acc: +/–1 dB) Power Target Ch A Ch.7 Power Target Ch B Tx Power 1216 (dBm, acc: +/–1 dB) Power Target Ch A Power Target Ch B 6 Mbps 54 Mbps Ch.8 6 Mbps 54 Mbps Ch.9 6 Mbps 54 Mbps Ch.10 6 Mbps 54 Mbps Ch.11 6 Mbps 54 Mbps Ch.12 6 Mbps 54 Mbps Ch.13 6 Mbps 54 Mbps 11n Ch1 MCS7/ 20 MHz Ch2 MCS7/ 20 MHz Ch3 MCS7/ 20 MHz Ch.4 MCS7/ 20 MHz Ch.5 MCS7/ 20 MHz Ch.6 MCS7/ 20 MHz Ch.7 MCS7/ 20 MHz Ch.
Performance JfP (2230/1216) CH MCS AC–9560 11a Tx Power 2230 MS (dBm, acc: +/–1 dB) Power Target Ch A Ch.13 MCS7/ 20 MHz Ch.36 6 Mbps Tx Power 1216 (dBm, acc: +/–1 dB) Power Target Ch B Power Target Ch A Power Target Ch B 54 Mbps Ch.40 6 Mbps 54 Mbps Ch.44 6 Mbps 54 Mbps Ch.48 6 Mbps 54 Mbps Ch.52 6 Mbps 54 Mbps Ch.56 6 Mbps 54 Mbps Ch.60 6 Mbps 54 Mbps Ch.64 6 Mbps 54 Mbps Ch.100 6 Mbps 54 Mbps Ch.104 6 Mbps 54 Mbps Ch.157 6 Mbps 54 Mbps Ch.161 6 Mbps 54 Mbps Ch.
Performance JfP (2230/1216) CH MCS AC–9560 11ac Tx Power 2230 MS (dBm, acc: +/–1 dB) Power Target Ch A Ch.100 MCS7/ 20 MHz Ch.102 MCS7/ 40 MHz Ch.161 MCS7/ 20 MHz Ch.159 MCS7/ 40 MHz Ch.165 MCS7/ 20 MHz Ch.40 MCS8/ 20 MHz Ch.46 MCS9/ 40 MHz Ch.42 MCS9/ 80 MHz Ch.100 MCS8/ 20 MHz Ch.102 MCS9/ 40 MHz Ch.106 MCS9/ 80 MHz Ch.161 MCS8/ 20 MHz Ch.159 MCS9/ 40 MHz Ch.
Performance 5.2.2 Wi-Fi sensitivity Table 5–4 Wi-Fi sensitivity Wi-Fi Sensitivity Targets 2230 [dBm] Band Mode Conditions LB 11b CCK, Rate 1Mbps, BW 20MHz, 10% PER Typ Max Wi-Fi Sensitivity Targets 1216 [dBm] Typ Max -96.5 -96.5 -94.5 -94.5 Rate 54Mbps, BW 20 MHz, 10% PER -77.0 -77.0 MCS0, BW 20 MHz, 10% PER -94.5 -94.5 -76.5 -76.5 -92.0 -92.0 -74.0 -74.0 -94.0 -94.0 Rate 54Mbps ,20 MHz, 10% PER -76.5 -76.5 MCS0, BW 20 MHz, 10% PER -94.0 -94.0 -76.0 -76.0 -92.0 -92.
Performance Wi-Fi Sensitivity Targets 2230 [dBm] Band Mode Conditions Typ Wi-Fi Sensitivity Targets 1216 [dBm] Max Typ Max MCS7, BW 80 MHz, 10% PER MCS8, BW 80 MHz, 10% PER -66.5 -66.5 MCS9, BW 80 MHz, 10% PER -64.5 -64.5 MCS0, BW 160 MHz, 10% PER -85.5 -85.5 MCS8, BW 160 MHz, 10% PER -62.5 -62.5 MCS9, BW 160 MHz, 10% PER -60.5 -60.5 NOTES: 1. Measured at ANT port 2. Typical means Nominal corner, AVG over non BE CHs. AVG over freq segment and chains 3. Max means over PVT 5.2.
Performance 5.3 Bluetooth performance 5.3.1 Bluetooth Tx power (TBD) Note: The content in this section is to be determined (TBD) in the next release. Table 5–6 Bluetooth Tx power (TBD) WsP BT Tx power Tx Power 1216 (dBm, acc: +/–2 dB) Tx Power 2230 MS (dBm, acc: +/–2 dB) Notes BR Typical Conditions EDR2 Typical Conditions EDR3 Typical Conditions BLE Typical Conditions Typical Operating Conditions are defined as: 1. Temperature of 25°C and nominal supply voltage. 2.
Performance 5.3.3 Bluetooth throughput targets This section details the Bluetooth throughput. The values are applicable to both 2230 and 1216 form factors. OPP throughput testing occurs in fully conductive environment. BTOE is a Broadcom 2070 card in an Intel NUC. Size of the file transferred is 3 MB and is tested three (3) times at each point. Wi-Fi and other cores are disabled. Bluetooth is connectable, not discoverable.
Thermal Specifications 6 Note: 6.1 Thermal Specifications The numbers in this section are not final, and are subject to change. Thermal dissipation Maximum thermal dissipation is based on the assumption that both Wi-Fi and Bluetooth communication are active. Table 6–1 describes the thermal dissipation and targets per operated mode.
Thermal Specifications 6.4 Module placement recommendations The module disperses excess heat through the RF shield and the screws that ground the module to the chassis. Correct module placement will ensure optimal thermal performance: The 2230 module orientation should be shield up. The 2230 module connection to chassis should be with a single metal screw. 6.
Regulatory 7 Regulatory 7.1 Regulatory channel support and output power Jefferson Peak provides regulatory compliance via statically-configured SKUs or DRS (Dynamic Regulatory Solution). For further details on the DRS scheme, refer to the DRS application note (see Section 8 8 ). 7.2 Wi-Fi channel configuration 7.2.1 Channel configuration – RF output power The values listed in Table 5–3 represent the target power for the calibration process without antennae gain.
Regulatory Output Power (dBm) 2.4 GHz 5.15 – 5.25 GHz 5.25 – 5.35 GHz 5.47 – 5.65 GHz 5.65 – 5.725 GHz 5.725 – 5.85 GHz Unit 20 23 23 30 30 33 dBm Worst Case Cond. mW2 100 50 200 250 250 100 mW Worst Case Cond. dBm1 17 18 18 18 18 18 dBm Country/Geo China EIRP NOTES: Reference antenna gain: Max. Antenna Gain 3 dBi for 2.4 GHz and 5 dBi for 5 GHz 1. Assuming Max. Antenna Gain 3 dBi for 2.4 GHz and 5 dBi for 5 GHz 2.
Regulatory Table 7–5 Wi-Fi safety and regulatory Australia/New Zealand Australia/ New Zealand Table 7–6 Criteria EMC EU test reports RF Radio communications (EMR) Standard 2003; EU test reports + Delta AS–NZ4268 Safety CB Cert.
Dynamic Regulatory Solution 8 Dynamic Regulatory Solution 8.1 Overview Beginning with the Intel® Dual Band Wireless 7265 module (Stone Peak 2/D), Intel® introduces a new Dynamic Regulatory Solution (DRS) which offers worldwide regulatory compliance on one hardware SKU, while offering optimizations to various country regulations based on geo–location discovery.
Platform Design Guidelines 9 Platform Design Guidelines This section includes important platform design and implementation aspects that the OEM should take into consideration when implementing a platform that would accommodate this product. Jefferson Peak is an integrated connectivity RF companion module, and there has special platform design guidelines are different from standard M.2 connectivity design features.
Platform Design Guidelines Figure 9–1 Platform connections to CNVi – Hybrid Key E scheme CNVi related SW components: • WiFi, BT, WiGiG drivers • BIOS Connectivity Platform VRs 3.3v WPR Aiding I2C WWAN Modem WiFi/BT UART UART UART BRI 32KHz clock clkreq0 RF_RESET_B REFCLK0 SOC XTAL WiFi RF companion Discrete connectivity WiFi/BT/WiGiG Combo RGI CNVi related straps • • • CNVio X WiGiG CLINK RFEM PCIe USB UART I2S 9.1.2 Connectorized Hybrid Key E (2230) pin-out The M.
Platform Design Guidelines 2. For Discrete: The most commonly used interfaces will work. Some interfaces will not be available and therefore some operation modes will not function. A list of restrictions on modes and interfaces can be found in Table 9–1. The pinout for the Hybrid Key E socket on the motherboard is shown in Figure 9–2. The inner columns show the Companion RF proprietary signals at their assigned pins.
Platform Design Guidelines Shared M.2 socket pins The following M.2 pins are shared between different functions: V3P3A, GND This is the M.2 card power supply (3.3V) and Ground pins, respectively. Both have multiple pins on the connector. These pins have the same purpose in either discrete or CNVi implementations, and therefore are not affected by the Hybrid Key E scheme. PCIe-1/CNVio These are six pins that are assigned to the PCIe-1 bus in the M.2 standard pinout.
Platform Design Guidelines NFC I/F, and A4WP+Ref clock In the Hybrid Key E scheme, only one of these four signals is used. This REFCLK0 signal connects the reference clock (single ended, 1V p-p, 38.4MHz) from the RF companion to the SoC. The remaining three signals are not used. Non-shared M.2 socket pins Some pins on the M.2 connector are not shared, meaning they are not used for any CNVi function. The functions of these pins can still be impacted by the Hybrid key E scheme as will be described here.
Platform Design Guidelines Table 9–1 Hybrid Key E interface mapping for different connectivity cards M.2 Interface CNVi Discrete PCIe-1 M.2 pins are not connected to the CRF. Wi-Fi uses internal IOSF to interface the host. Used for Wi-Fi host interface PCIe-2 Not functional Not functional Pins are connected to CRF and Pulsar CNVio and can’t be used as PCIe. Pins are connected to Pulsar CNVio and can’t be used as PCIe.
Platform Design Guidelines either a standard M.2 1216 card or an RF companion 1216 card. However, unlike in the connectorized case, swapping cards requires removing a soldered-down module, and so can’t be done with a simple socket card exchange. Additionally, the assembly tooling and BOM should change between a discrete and CNVi motherboard assembly. The special pad-out required for supporting CNVi and discrete is shown in Figure 9–3 and Figure 9–4.
Platform Design Guidelines Figure 9–4 SD-1216 module pad-out for supporting CNVi and Discrete 1216 modules 9.1.5 Breakout example for JfP soldered-down module The soldered-down JfP module has a special pad shape, which combines the standard M.2 pad ring on the outside with the new inner ring of the CNVi pads. It is recommended that the OEM consider all signal properties when designing the motherboard for dual discrete/CNVi design supporting Jefferson Peak 1216.
Platform Design Guidelines G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND Board layout example showing breakout from JfP 1216 pads (design for CNVi only) G ND Figure 9–5 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 G ND G1 G4 G ND 76 G ND 1 2 75 G ND 74 G ND 3 Powe r 3.3V 4 3.3V 5 73 3.3V 72 3.
Platform Design Guidelines G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND Board layout example showing breakout from JfP 1216 pads (dual design for CNVi and discrete) G ND Figure 9–6 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 G ND 3 74 G ND 3.3V 4 73 Coex sig na ls Powe r 3.3V 3.3V 5 72 3.
Platform Design Guidelines I/F Signals PU/PD Guideline Rationale BRI_RSP / Rx PU Intel SoC with CNVi support have internal PU/PD as needed. RGI_DT / Tx BT UART WAKE# PU Open drain, required by M.2 PU Required by Intel platform design guidelines PEWAKE# PU Open drain, required by M.2 CLKREQ# PU Open drain, required by M.2 PERST# PD Required by Intel platform design guidelines Other PCIe signals None PCIe spec RefCLK PD W_Disable# PCIe 38.
Platform Design Guidelines between the two data lanes and the clock. There are no special delay-matching requirements between lanes in opposite directions. Table 9–3 CNVio recommended parameters Parameter Value Comment Differential pair length matching: 0.02UI This parameters may effect EMI and RFI Characteristic impedance 100 ohm differential 50 ohm to ground for each trace Maximum length 10 inch 9 inch from M.
Platform Design Guidelines Wi-Fi/BT/LTE coexistence signals In order to allow a Hybrid Key E scheme supporting both connectivity and a cellular modem, there is a need to connect the modem coexistence bus in a configuration that will allow the modem to connect to the connectivity coexistence control logic. In Intel connectivity modules, this logic may reside in the M.
Platform Design Guidelines 9.1.11 Power supply de-coupling It is required to have decoupling caps on the power feeds in each end of the connector. 10uF+0.1uF+0.01uF at one end of socket in support of 3.3 V pins 2 and 4 (in 2230 modules) or pins 4 and 5 (in 1216 modules). 10uF+0.1uF+0.01uF at the other end of the socket in support of 3.3 V pins 70 and 72 (in 2230 modules) or pins 72 and 73 (in 1216 modules). 9.1.12 Wi-Fi wireless disable and HW RF-KILL W_DISABLE1# (pin 56 in M.
警語 經型式認證合格之低功率射頻電機，非經許可，公司、商號或使用者均不得擅自變 更頻率、加大功率或變更原設計之特性及功能。 (即低功率電波輻射性電機管理辦法第十二條) 低功率射頻電機之使用不得影響飛航安全及干擾合法通信；經發現有干擾現象時， 應立即停用，並改善至無干擾時方得繼續使用。 前項合法通信，指依電信法規定作業之無線電通信。低功率射頻電機須忍受合法通 信或工業、科學及醫療用電波輻射性電機設備之干擾。 (即低功率電波輻射性電機管理辦法第十四條) 本模組於取得認證後將依規定於模組本體標示審驗合格標籤，並要求最終產品平台 廠商(OEM Integrator)於最終產品平台(End Product)上標示” 本產品內含射頻模 組，其 NCC 型式認證號碼為: CCXXxxYYyyyZzW
REGULATORY INFORMATION USA - Federal Communications Commission (FCC) This wireless adapter is restricted to indoor use due to its operation in the 5.15 to 5.25 and 5.470 to 5.75GHz frequency ranges. No configuration controls are provided for Intel® wireless adapters allowing any change in the frequency of operations outside the FCC grant of authorization for U.S. operation according to Part 15.407 of the FCC rules. Intel® wireless adapters are intended for OEM integrators only.
Consult the dealer or an experienced radio/TV technician for help. NOTE: The adapter must be installed and used in strict accordance with the manufacturer's instructions as described in the user documentation that comes with the product. Any other installation or use will violate FCC Part 15 regulations. Canada – Industry Canada (IC) This device complies with Industry Canada licence-exempt RSS standard(s).
peuvent créer des interférences avec ce produit et/ou lui être nuisible. Le gain d'antenne maximum permissible pour une utilisation avec ce produit est de 6 dBi afin d'être conforme aux limites de puissance isotropique rayonnée équivalente (P.I.R.E.) applicable dans les bandes 5.25-5.35 GHz et 5.725-5.85 GHz en fonctionnement point-àpoint.
Japan 5GHz 帯は室内でのみ使用のこと Korea 해당 무선설비는 전파혼신 가능성이 있으므로 인명안전과 관련된 서비스는 할 수 없음. 해당 무선 설비는 5150-5250MHz 대역에서 실내에서만 사용할 수 있음. Mexico La operación de este equipo está sujeta a las siguientes dos condiciones: (1) es posible que este equipo o dispositivo no cause interferencia perjudicial y (2) este equipo o dispositivo debe aceptar cualquier interferencia, incluyendo la que pueda causar su operación no deseada.
