Getting Started With SHARC® Processors Revision 3.0, April 2010 Part Number 82-003536-01 Analog Devices, Inc. One Technology Way Norwood, Mass.
Copyright Information ©2010 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices, Inc. is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices, Inc.
CONTENTS PREFACE Purpose of This Manual .................................................................. ix Intended Audience .......................................................................... ix Manual Contents ............................................................................. x What’s New in This Manual ............................................................. x Technical or Customer Support ........................................................ x Supported SHARC Processors ...
Contents Processor Peripherals and Performance .......................................... 1-8 Performance ............................................................................ 1-8 THE EVALUATION PROCESS Evaluation Tools ........................................................................... 2-1 Selecting Software Development Tools ..................................... 2-2 VisualDSP++ From Analog Devices ..................................... 2-2 Platform and Processor Support ...................
Contents EZ-Boards ........................................................................ 2-36 ADSP-21489 EZ-Board From Analog Devices ............... 2-37 ADSP-21479 EZ-Board From Analog Devices ............... 2-40 ADSP-21469 EZ-Board From Analog Devices ............... 2-43 Debug Agent ................................................................. 2-46 EZ-Extender Daughter Boards ....................................... 2-47 SHARC USB EZ-Extender ............................................
Contents Platform-Related Information ............................................. 3-3 Visual Learning and Development (VLD) ........................... 3-4 Workshops and Seminars ......................................................... 3-4 SHARC Processor Workshops ............................................. 3-4 SHARC Processor Seminars ................................................ 3-5 Processor Documentation ........................................................ 3-5 SHARC Processor Manuals .....
Contents VisualDSP++ Loader and Utilities Manual ..................... 3-11 VisualDSP++ Example Programs ................................... 3-12 Hardware Tools Documentation ........................................ 3-13 SHARC EZ-KIT Lite Evaluation System Manual ........... 3-13 SHARC EZ-Board Evaluation System Manual ............... 3-14 SHARC EZ-Extender Manual ....................................... 3-14 VisualDSP++ Help ............................................................
Contents viii Getting Started With SHARC Processors
PREFACE Thank you for your interest in the SHARC® family of processors from Analog Devices, Inc. Purpose of This Manual Getting Started With SHARC Processors provides you with information about the evaluation process, Analog Devices tools, training, documentation, and other informational resources to assist you in the evaluation of SHARC processors. This manual describes the resources available to help you evaluate and design the SHARC processors into your final system.
Manual Contents Manual Contents This manual consists of: • Chapter 1, “Introduction to SHARC Processors” This chapter briefly describes the processor architecture, available models, and processor features. • Chapter 2, “The Evaluation Process” This chapter focuses on available software and hardware tools. • Chapter 3, “Support Options” This chapter describes support (documentation, training, and more) available during the evaluation and development processes. What’s New in This Manual This is Revision 3.
Preface • E-mail processor questions to: processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support) • Phone questions to 1-800-ANALOGD • Contact your Analog Devices, Inc. local sales office or authorized distributor Supported SHARC Processors The name “SHARC” refers to a family of high performance, 32-bit, floating-point processors that can be used in speech, sound, graphics, and imaging applications.
Product Information Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, www.analog.com, provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. To access a complete technical library for each processor family, go to http://www.analog.com/processors/technical_library.
Preface VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format (.pdf) files for all manuals are provided on the VisualDSP++ installation CD.
Product Information Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata.
1 INTRODUCTION TO SHARC PROCESSORS This chapter briefly describes the SHARC processor’s architecture and key features and compares available models. Topics include: • “What are SHARC Processors?” on page 1-1 • “Four Generations of SHARC Processors” on page 1-5 What are SHARC Processors? SHARC is the name of a family of high performance 32-bit floating-point processors based on a Super Harvard Architecture.
What are SHARC Processors? enables the SHARC user to leverage legacy code and design experience, while transitioning to higher-performance, more highly-integrated SHARC products. By integrating on-chip, single-instruction, multiple-data (SIMD) processing elements, SDRAM, and I/O peripherals, SHARC processors deliver breakthrough signal processing performance.
Introduction to SHARC Processors • Automotive audio applications. The ADSP-21362, ADSP-21365, ADSP-21369, ADSP-21371, ADSP-21462, ADSP-21465, ADSP-21469, ADSP-21472, ADSP-21475, and ADSP-21479 processors, with integration of sample-rate conversion, DTCP cipher, precision clock generators, and serial ports, are ideal choices for new multichannel automotive audio designs. • Broad market use. SHARC processors are available in commercial, industrial, and automotive temperature grade packages.
What are SHARC Processors? Common Architectural Features SHARC processors share the following architectural features. • 32/40-bit IEEE floating-point math • 32-bit fixed-point multipliers with 64-bit product and 80-bit accumulation • No arithmetic pipeline. All computations are single cycle.
Introduction to SHARC Processors • An SDRAM controller that provides an interface to as many as four separate banks of industry-standard SDRAM devices • Up to a maximum of 5M bits of on-chip SRAM and up to 4M bits of on-chip, mask-programmable ROM • Input/output processor (IOP) with integrated direct memory access (DMA) controller, serial peripheral interface (SPI) compatible port, and serial ports (SPORTs) for point-to-point multiprocessor communications • A variety of audio-centric peripheral modules inc
What are SHARC Processors? Internal Memory SIMD Core Block 0 RAM/ROM Instruction Cache 5 Stage Sequencer DAG1/2 Core Timer PEx FLAGx/IRQx/ TMREXP DMD 64-BIT PEy JTAG PMD 64-BIT THERMAL DIODE S B0D 64-BIT Block 1 RAM/ROM B1D 64-BIT Block 2 RAM B2D 64-BIT Block 3 RAM B3D 64-BIT DMD 64-BIT Core Bus Cross Bar Internal Memory I/F PMD 64-BIT EPD BUS 64-BIT IOD0 32-BIT PERIPHERAL BUS 32-BIT IOD1 32-BIT IOD0 BUS FFT FIR IIR DTCP/ MTM PERIPHERAL BUS EP SPEP BUS CORE FLAGS/ PWM3-1 PC
Introduction to SHARC Processors variety of applications. This capability is especially relevant in consumer, automotive, and professional audio where the algorithms related to stereo channel processing can effectively utilize the SIMD architecture. Third generation SHARC products employ an enhanced SIMD architecture that extends CPU performance to an impressive 400 MHz/2.4 GFLOPS.
Processor Peripherals and Performance Integration of peripherals continue with serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller, again preserving internal memory space for code and data. The fourth generation processor also incorporates link ports that allow processor-to-processor communication for data movement.
Introduction to SHARC Processors execution (including single cycle multiply accumulates [MACs]), SHARC processors are designed for maximum I/O and memory access bandwidth. This balance of core speed, memory integration, and I/O bandwidth achieves the sustained performance critical to real-time applications. Table 1-1.
Processor Peripherals and Performance Table 1-2. ADSP-2136x/ADSP-2137x SHARC Processor Specifications ADSP21362 ADSP21363 ADSP21364 ADSP21365 ADSP21366 ADSP21367 ADSP21368 ADSP21369 ADSP21371 ADSP21375 Frequency (MHz) 333 333 333 333 333 266, 333, 400 333, 400 266, 333, 400 266 266 On-Chip RAM 3M bit 3M bit 3M bit 3M bit 3M bit 2M bit 2M bit 2M bit 1M bit 0.
Introduction to SHARC Processors Table 1-3. ADSP-2146x SHARC Processor Specifications ADSP-21462 ADSP-21465 ADSP-21467 ADSP-21469 Frequency (MHz) 400 400 450 450 On-Chip RAM 5M bit 5M bit 5M bit 5M bit On-Chip ROM 0M bit 4M bit 4M bit 0M bit SRC –128dB –128dB –128dB –128dB PWM 1 1 1 1 UART 1 1 1 1 SPI 2 2 2 2 SPDIF 1 1 1 1 TWI 1 1 1 1 Timer 2 2 2 2 SPORT 8 8 8 8 SRU 1 1 1 1 DTCP 1 1 0 0 PCG 4 4 4 4 Temp.
Processor Peripherals and Performance Table 1-3.
Introduction to SHARC Processors Table 1-4. ADSP-2147x SHARC Processor Specifications ADSP-21478 ADSP-21479 Frequency (MHz) 266 266 On-Chip RAM 3M bit 5M bit On-Chip ROM 0M bit 0M bit SRC –128dB –128dB PWM 4 4 UART 1 1 SPI 2 2 SPDIF 1 1 TWI 1 1 Timer 2 2 SPORT 8 8 SRU 1 1 DTCP 0 0 PCG 4 4 Temp. Grade 0°C to +70°C –40°C to +105°C Execution from Ext.
Processor Peripherals and Performance Table 1-4.
Introduction to SHARC Processors Table 1-5.
Processor Peripherals and Performance 1-16 Getting Started With SHARC Processors
2 THE EVALUATION PROCESS This chapter describes the available software and hardware tools needed to evaluate SHARC processors and develop application programs. This chapter introduces the software and hardware evaluation tools that are currently available, including: • “Selecting Software Development Tools” on page 2-2 • “Selecting the Right Combination of Tools” on page 2-60 Evaluation Tools This section examines the process through which SHARC processor applications are developed.
Evaluation Tools “Selecting Software Development Tools” provides a summary of the available software development tools for SHARC processors. Most development tools available for SHARC processors provide a cycle-accurate simulator which can be used to develop initial algorithms and applications without the actual hardware. Selecting Software Development Tools Because SHARC processors are programmable, software development tools are required to author software applications.
The Evaluation Process Decide to evaluate SHARC Simulation Download VisualDSP++ Test Drive Purchase EZ-KIT Lite license (part of VisualDSP++ evaluation license) Evaluation Test Drive version of VisualDSP++ - Free - Simulation only - 90-day license EZ-KIT Lite allows VisualDSP++ tools to work with either JTAG emulator pod or with included USB cable directly connected to PC.
Evaluation Tools Platform and Processor Support VisualDSP++ supports SHARC processors from Analog Devices. Windows® System 7 (as of VisualDSP++ 5.0 Update 7), Windows® Vista, Windows® XP, and Windows® 2000 hosts are supported. Develop High Performance Applications Quickly At the heart of VisualDSP++ is a robust and powerful C/C++ compiler.
The Evaluation Process ease of use with the ability to import C header files, allowing for symbolic references into arbitrarily complex C data structures. Binary data can be included directly into assembly source files, creating an easy way to add blocks of static data (such as audio samples and bitmaps) to an application. The VisualDSP++ linker is fully multicore and multiprocessor (MP) aware, allowing for the creation of cross-linked, multi-executable applications in a single pass.
Evaluation Tools Configuration of these elements is done graphically, with code wizards to speed the creation of new threads and interrupt handlers. VDK has been available for multiple releases of VisualDSP++ and is now a key component of products shipping from a number of high-volume vendors. As embedded applications become increasingly part of the connected world, the ability to rapidly add reliable USB connectivity to an application can often make or break a development schedule.
The Evaluation Process required. VisualDSP++ provides core cycle-accurate simulators, allowing inspection of every nuance of activity within the processor, including visualization of the processor’s pipeline and cache. As many of the most performance-demanding applications process a signal of some sort, comprehensive memory plotting is a corner stone of VisualDSP++ debugger support.
Evaluation Tools the majority of its time is quickly assembled. This tool can be used to easily inspect an application for unexpected hotspots (for example, suggesting the need to move a key routine from external to internal memory). Simulator targets provide a completely linear profiling view. Going even further, the VisualDSP++ compiler is able to act upon profiling information.
The Evaluation Process every feature of the graphical environment is available to script authors. Applications can be rebuilt, downloaded, and run from a simple script executed from the command line or from within a custom test harness framework. The automation API is supported by C++ and VBScript examples for all API calls, though any automation-aware language can be used.
Evaluation Tools Take a VisualDSP++ Test Drive! Take a free 90-day Test Drive of VisualDSP++. To take a Test Drive, you can download a Test Drive or request a CD from the Analog Devices DSP Tools Web site at: http://www.analog.com/processors/tools/testdrive or contact your local Analog Devices sales representative/distributor.
The Evaluation Process Table 2-1.
Evaluation Tools Software Modules Analog Devices has a wide range of tested and optimized software modules available, including decoders, encoders, codecs and other algorithms that provide multimedia functions for the SHARC family. The software modules allow engineers to quickly and easily incorporate these functions, providing a faster development path to the end product.
The Evaluation Process set breakpoints, single-step through code, view memory, fill/dump memory, perform real-time data manipulation, profile execution and memory access, plot data, and use standard I/O. EZ-KIT Lite evaluation systems include a serial number, that when registered, yields full VisualDSP++ license status for 90 days from the date of installation.
Evaluation Tools ADSP-21489 EZ-KIT Lite From Analog Devices Part Number: ADZS-21489-EZLITE Figure 2-2.
The Evaluation Process The ADSP-21489 EZ-KIT Lite evaluation system, as shown in Figure 2-2, provides developers with a cost-effective method for initial evaluation of the ADSP-21483/21486/21487/21489 SHARC processors via a USB-based, PC-hosted tool set. ADSP-21483/21486/21487/21489 SHARC processors, which The are pin-compatible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21489 processor.
Evaluation Tools ADSP-21479 EZ-KIT Lite From Analog Devices Part Number: ADZS-21479-EZLITE Figure 2-3.
The Evaluation Process USB-based, PC-hosted tool set. With this EZ-KIT Lite, users can learn more about Analog Devices ADSP-21479 hardware and software development, and quickly prototype a wide range of applications. ADSP-21478/21479 SHARC processors, which are pin-com The patible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21479 processor. Thus the EZ-KIT Lite evaluation system may be used for any of these devices.
Evaluation Tools ADSP-21469 EZ-KIT Lite From Analog Devices Part Number: ADZS-21469-EZLITE Figure 2-4.
The Evaluation Process The ADSP-21469 EZ-KIT Lite evaluation system, as shown in Figure 2-4, provides a cost-effective method for initial evaluation of the ADSP-21462/21465/21467/21469 SHARC processors via a USB-based PC-hosted tool set. ADSP-21462/21465/21467/21469 SHARC processors, which The are pin-compatible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21469 processor. Thus the EZ-KIT Lite evaluation system may be used for any of these devices.
Evaluation Tools • Headphone jack (connected to one of the stereo outputs) • SPDIF In RCA jack • SPDIF Out RCA jack • ADM1032 two-wire sensor • ADM3202 RS-232 line driver/receiver • USB standalone debug agent • USB 2.0 interface • JTAG ICE 14-pin header • Evaluation suite of VisualDSP++ development tools • Flash programmer utility for downloading boot code to on-board flash memory • SHARC expansion interface II with connectors supporting EBIU, Flags/IRQs, DAI, DPI, PWR_IN, 3.
The Evaluation Process ADSP-21375 EZ-KIT Lite From Analog Devices Part Number: ADZS-21375-EZLITE Figure 2-5. ADSP-21375 EZ-KIT Lite Evaluation System The ADSP-21375 EZ-KIT Lite evaluation system, as shown in Figure 2-5, provides developers with a cost-effective method for initial evaluation of the ADSP-21375 SHARC processors.
Evaluation Tools Lite, users can learn more about Analog Devices ADSP-21375 SHARC processor hardware and software development and prototype applications. The ADSP-21375 EZ-KIT Lite provides an evaluation suite of the VisualDSP++ development environment with the C/C++ compiler, assembler, loader, and linker. All software tools are limited to use with the EZ-KIT Lite.
The Evaluation Process • 26-pin DAI header • 11 LEDs: 1 power (green), 1 board reset (red), 1 USB monitor (amber), and 8 general-purpose (amber) • 5 push buttons: 1 reset, 2 connected to DAI, 2 connected to the FLAG pins of the processor • CE certified Getting Started With SHARC Processors 2-23
Evaluation Tools ADSP-21371 EZ-KIT Lite From Analog Devices Part Number: ADZS-21371-EZLITE Figure 2-6. ADSP-21371 EZ-KIT Lite Evaluation System The ADSP-21371 EZ-KIT Lite evaluation system, as shown in Figure 2-6, provides developers with a cost-effective method for initial evaluation of the ADSP-21371 SHARC processors. With this EZ-KIT Lite, users can learn more about the Analog Devices ADSP-21371 hardware and software development tools, and quickly prototype a wide range of applications.
The Evaluation Process The EZ-KIT Lite includes an ADSP-21371 SHARC processor desktop evaluation board along with an evaluation suite of the VisualDSP++ development and debugging environment, including the C/C++ compiler, assembler, and linker. The evaluation suite of VisualDSP++ is designed to be used with the EZ-KIT Lite only. Additionally, the ADSP-21371 EZ-KIT Lite contains the National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) interface.
Evaluation Tools • National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) Interface • JTAG ICE 14-pin header • Evaluation suite of VisualDSP++ development tools • Type A expansion interface with three connectors supporting parallel port, FLAG, DPI, and DAI interfaces • 26-pin DPI header • 20-pin DAI header • 11 LEDs: 1 power (green), 1 board reset (red), 1 USB monitor (amber), and 8 general-purpose (amber) • 5 push buttons: 1 reset, 2 connected to DAI, 2 connected to the FLAG pin
The Evaluation Process ADSP-21369 EZ-KIT Lite From Analog Devices Part Number: ADZS-21369-EZLITE Figure 2-7.
Evaluation Tools The ADSP-21369 EZ-KIT Lite, as shown in as shown in Figure 2-7, provides a cost-effective method for initial evaluation of the ADSP-21367/21368/21369 SHARC processors via a USB-based PC-hosted tool set. ADSP-21367/21368/21369 SHARC processors, which are The pin-compatible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21369 processor. Thus the EZ-KIT Lite evaluation system may be used for any of these devices.
The Evaluation Process • SPDIF Out RCA jack • ADM3202 RS-232 driver/receiver • USB interface • JTAG ICE 14-pin header • Evaluation suite of VisualDSP++ development tools • Flash programmer utility for downloading boot code to on-board flash memory • Type A expansion interface with three connectors supporting external port, FLAG, SPI, and DAI interfaces • 20-pin DPI header • 26-pin DAI header • 12 LEDs: 1 power (green), 1 board reset (red), 1 USB reset (red), 1 USB monitor (amber), and 8 general-purpose (am
Evaluation Tools ADSP-21364 EZ-KIT Lite From Analog Devices Part Number: ADZS-21364-EZLITE Figure 2-8.
The Evaluation Process The ADSP-21364 EZ-KIT Lite evaluation system, as shown in Figure 2-8, provides developers with a cost-effective method for initial evaluation of ADSP-21363/21364/21365/21366 SHARC processors. ADSP-21363/21364/21365/21366 SHARC processors, which The are pin-compatible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21364 SHARC processor. Thus, this EZ-KIT Lite evaluation system may be used for any of these devices.
Evaluation Tools • SPDIF Out RCA jack • USB interface • JTAG ICE 14-pin header • Evaluation suite of VisualDSP++ development tools • Flash programmer utility for downloading boot code to on-board flash memory • Type A expansion interface with three connectors supporting parallel port, FLAG, SPI, and DAI interfaces • 4 programmable flags • 11 LEDs: 1 power (green), 1 board reset (red), 1 USB monitor (amber), and 8 general-purpose (amber) • 5 push buttons: 1 reset, 2 connected to DAI, 2 connected to the FLAG
The Evaluation Process ADSP-21262 EZ-KIT Lite From Analog Devices Part Number: ADZS-21262-EZLITE Figure 2-9.
Evaluation Tools The ADSP-21262 EZ-KIT Lite evaluation system, as shown in Figure 2-9, provides developers with a cost-effective method for initial evaluation of the ADSP-21261/21262/21266 SHARC processors for a wide range of applications. ADSP-21261/21262/21266 SHARC processors, which are The pin-compatible, have similar memory maps. Software development for any of these devices can be performed on the ADSP-21262 SHARC processor.
The Evaluation Process • 1 x 2 RCA jack for 1 channel of stereo audio input • Headphone jack (connected to one of the stereo outputs) • SPDIF receiver with RCA jack • USB interface • JTAG ICE 14-pin header • Evaluation suite of VisualDSP++ development tools • 0-ohm resistor for current measurement • Flash programmer utility for downloading boot code to on-board flash memory • Type A expansion interface with three connectors supporting parallel port, FLAG, SPI, and DAI interfaces • 12 LEDs: 1 power (green),
Evaluation Tools EZ-Boards SHARC EZ-Board evaluation boards provide developers with a low cost platform for initial evaluation of SHARC processors via an external JTAG emulator or standalone debug agent board. To debug, you must have a debug agent board or an emulator. The EZ-Board has an expansion interface that allows for modularity with different EZ-Extender boards.
The Evaluation Process ADSP-21489 EZ-Board From Analog Devices Part Number: ADZS-21489-EZBRD Figure 2-10.
Evaluation Tools The ADSP-21489 EZ-Board evaluation board, as shown in Figure 2-10, provides developers with a low cost platform for initial evaluation of the ADSP-2148x SHARC processors via an external JTAG emulator or standalone debug agent board. debug, you must have a debug agent board or emulator. The ToEZ-Board has an expansion interface that allows for modularity with different EZ-Extender boards.
The Evaluation Process • Expansion interface: AMI, flags/IRQs, DAI, DPI, PWR_IN, 3.
Evaluation Tools ADSP-21479 EZ-Board From Analog Devices Part Number: ADZS-21479-EZBRD Figure 2-11.
The Evaluation Process The ADSP-21479 EZ-Board evaluation board, as shown in Figure 2-11, provides developers with a low cost platform for initial evaluation of the ADSP-2147x SHARC processors via an external JTAG emulator or standalone debug agent board. debug, you must have a debug agent board or emulator. The ToEZ-Board has an expansion interface that allows for modularity with different EZ-Extender boards. Features • ADSP-21479 SHARC processor • 196-pin BGA package • 16.
Evaluation Tools • Expansion interface: AMI, flags/IRQs, DAI, DPI, PWR_IN, 3.
The Evaluation Process ADSP-21469 EZ-Board From Analog Devices Part Number: ADZS-21469-EZBRD Figure 2-12.
Evaluation Tools The ADSP-21469 EZ-Board evaluation board, as shown in Figure 2-12, provides developers with a low cost platform for initial evaluation of the ADSP-2146x SHARC processors via an external JTAG emulator or standalone debug agent board. debug, you must have a debug agent board or emulator. The ToEZ-Board has an expansion interface that allows for modularity with different EZ-Extender boards.
The Evaluation Process • Expansion interface: EBIU, flags/IRQs, DAI, DPI, PWR_IN (5 V), 3.
Evaluation Tools Debug Agent Part Number: ADZS-DBGAGENT-BRD Figure 2-13. Debug Agent Board The standalone debug agent is intended to provide a modular low cost emulation solution for EZ-Boards as well as evaluation boards designed by third parties. The standalone debug agent is very similar to the debug agent that is on existing EZ-KIT Lites but has the flexibility to move from one board to another board.
The Evaluation Process EZ-Extender Daughter Boards EZ-Extender daughter boards enhance and extend EZ-Board and EZ-KIT Lite features and functionalities. This section describes the EZ-Extender daughter boards that are currently available. SHARC USB EZ-Extender Part Number: ADZS-SHRCUSB-EZEXT Figure 2-14.
Evaluation Tools The SHARC USB EZ-Extender daughter board, as shown in Figure 2-14, provides a solution for users to evaluate different peripherals on SHARC processors. The SHARC USB EZ-Extender daughter board allows developers to connect to the parallel port on the ADSP-21262 and ADSP-21364 EZ-KIT Lite and to the asynchronous memory bus on the ADSP-21369 EZ-KIT Lite and the ADSP-21375 EZ-KIT Lite. The EZ-Extender has peripherals that support USB 2.0.
The Evaluation Process SHARC EZ-Extender Part Number: ADZS-21262-1-EZEXT Figure 2-15. SHARC EZ-Extender The SHARC EZ-Extender daughter board, as shown in Figure 2-15, is a separately sold assembly that plugs into a SHARC EZ-KIT Lite evaluation system’s expansion interface. The extender aids the design and prototyping phases of SHARC processor-targeted applications.
Evaluation Tools EZ-KIT Lite. The SHARC EZ-Extender also provides developers a breadboard area and the ability to access all of the pins on the ADSP-21262 and ADSP-21364 EZ-KIT Lite’s expansion interface. The SHARC EZ-Extender features: • Expansion interface for connecting to the ADSP-21262 and ADSP-21364 EZ-KIT Lites • Analog Devices high-speed converter (HSC) interface for connecting analog-to-digital (ADC) HSC evaluation boards such as the AD9244-40PCB and the AD9244-65PCB • 40-pin, 0.1-in.
The Evaluation Process SHARC Audio EZ-Extender Part Number: ADZS-SHAUDIO-EZEXT Figure 2-16. SHARC Audio EZ-Extender The SHARC audio EZ-Extender daughter board, as shown in Figure 2-16, provides a solution for users to evaluate audio applications on the ADSP-214xx EZ-Board/EZ-KIT Lite. Software examples are provided in the latest update of VisualDSP++.
Evaluation Tools The EZ-Extender consists of three Analog Devices AD1939 audio codecs and provides 24 channels of analog audio out, 12 channels of analog audio in. The primary codec operates in both in I2S and TDM mode and can run at sample rates of 48, 96, or 192 kHz. The other two codecs are configured to operate in dual line TDM mode. The three codecs together can operate in dual line TDM mode for 24 analog channels out and 12 analog channels in at a sample rate of 192 kHz.
The Evaluation Process USB EZ-Extender for Blackfin and SHARC Part Number: ADZS-BFSHUSB-EZEXT Figure 2-17. Blackfin/SHARC USB EZ-Extender The Blackfin/SHARC USB EZ-Extender daughter board, as shown in Figure 2-17, plugs onto the expansion interface of the ADSP-BF518F, ADSP-BF526, and ADSP-21469 EZ-Board and EZ-KIT Lite.
Evaluation Tools The Blackfin/SHARC USB EZ-Extender daughter board features: • USB 2.0 interface – PLX Technology NET2272 device • USB driver and application code • CE certified JTAG Emulators JTAG (Joint Test Action Group) is defined by the IEEE 1149.1 standard for a test access port for testing electronic devices. This standard defines a method for serially scanning the I/O status of each pin on the device as well as controlling internal operation of the device.
The Evaluation Process High Performance USB 2.0 JTAG Emulator Part Number: ADZS-HPUSB-ICE Figure 2-18. High Performance USB 2.0 JTAG Emulator The Analog Devices high-speed, high performance, universal serial bus-based emulator (HP-USB), as shown in Figure 2-18, provides a portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors.
Evaluation Tools These easy-to-use USB-based emulators perform a wide range of emulation functions, including single-step and full-speed execution with predefined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the HP-USB emulator enables you to communicate with all of the Analog Devices JTAG processors using a full-speed USB 1.0 or high-speed USB 2.0 port on the host PC.
The Evaluation Process • 5 V tolerant and 3.
Evaluation Tools USB 1.1 JTAG Emulator Part Number: ADZS-USB-ICE Figure 2-19. USB 1.1 JTAG Emulator The cost-effective universal serial bus (USB)-based emulator, as shown in Figure 2-19, from Analog Devices provides a portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors.
The Evaluation Process This USB-based emulator performs a wide range of emulation functions, including single-step and full-speed execution with predefined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the USB emulator enables users to communicate with all of the Analog Devices JTAG processors using a full-speed USB 1.1 or high-speed USB 2.0 port on the host PC.
Evaluation Tools • 14-pin JTAG connector • 3-meter USB cable for difficult to reach targets Selecting the Right Combination of Tools Knowing which tools to use is critical to ensuring a quick development cycle. There are many options for software and hardware development tools. Two of the most common scenarios described in this section contain circumstances encountered by other developers along with recommended solutions. Your needs may be similar to one of the following scenarios. Scenario 1 Question.
The Evaluation Process After you have finished constructing your hardware, purchase a low cost USB emulator (p/n: ADZS-USB-ICE) from Analog Devices. Scenario 2 Question. We have a team of five software engineers who are developing code for the SHARC processor, but no more than three are likely to be using the tools at any given time. How do we handle licensing? Does each engineer need a license? Answer. A floating license may be right for you. VisualDSP++ may be installed on many machines.
Evaluation Tools 2-62 Getting Started With SHARC Processors
3 SUPPORT OPTIONS This chapter addresses the support options available for users both during the evaluation process and development phases of SHARC processor processor design. Available Support Analog Devices provides a wide variety of processor support options. Material is available online. Live training is also available.
Available Support • Communities-related information • Platform-related information Visit the SHARC processor home page at: http://www.analog.com/sharc. The Analog Devices Embedded Processing and DSP page, which offers access to other processor families, is located at: http://www.analog.com/processors To visit the knowledge base, use your browser to access this site: http://www.analog.com/processors/knowledgebase.
Support Options Applications Notes, EE-Notes, and Other Articles The most useful documents available to users are the Application or EE(Engineer-to-Engineer) Notes, since they offer detailed technical information about using the SHARC processor. These materials may be downloaded from the Web site. These documents supplement the standard documentation for processors and tools. EE-Notes focus on a very narrow or specific topic.
Available Support Visual Learning and Development (VLD) The Analog Devices Web site offers free on-demand video tutorials. Subjects include: • SHARC Processors Overview • SHARC ADSP-2146x Processor Overview • SHARC ADSP-21469 EZ-KIT Overview Please go to http://www.analog.com/vld for additional video modules. Workshops and Seminars The most efficient way to learn about the SHARC processor architecture is by attending a 3½-day (or 1-day) SHARC seminar.
Support Options Advanced instructions are presented with a follow on lab session about code optimization. The I/O peripherals, which include the SPORTS, link ports, and external port, are discussed in detail along with DMA operation between these peripherals and internal memory. Workshops are offered through Kaztek Engineering throughout the world. Visit the Kaztek Web site for the schedule of upcoming workshops and pricing information at: http://www.kaztek.
Available Support Hardware Reference Manuals Each processor’s hardware reference manual provides architectural information about that particular SHARC processor. The descriptions cover functional blocks, buses, and ports, including all features and processes that they support. The VisualDSP++ Help system also includes a copy of each hardware reference manual and provides powerful search facilities to help you locate information. You can find SHARC processor hardware reference manuals at: http://www.analog.
Support Options Data Sheets Data sheets are created for each SHARC processor and for each revision of a single product. Each SHARC processor data sheet provides: • A high-level overview of the processor • A description of processor pins • Electrical, power, and timing characteristics/requirements • Device package dimensions • Environmental (temperature) information To obtain data sheets for SHARC processors, open your browser and access: http://www.analog.
Available Support BSDL Files Boundary scan description language (BSDL) files are necessary for the application of boundary scan for board and system-level testing and in-system programming. BSDL files are the electronic data sheets that describe the IEEE 1149.1 or JTAG design within an IC, and are provided by the IC vendors as part of their device specifications. Use BSDL files to describe the test logic and generate a test for a loaded board.
Support Options To access the VisualDSP++ Tools Anomalies search page, point your browser at: http://www.analog.com/processors/tools/anomalies VisualDSP++ Documentation This section briefly describes the VisualDSP++ manual set. Electronic versions of the documentation are available from the VisualDSP++ installation CD-ROM or via download from the following Web page: http://www.analog.
Available Support VisualDSP++ User’s Guide This manual describes the features, components, and functions of the VisualDSP++ integrated development and debugging environment (IDDE). It covers license management, project management, code development, debugging tools, VDK, and much more. Use this high-level reference to delve further into the powerful features of VisualDSP++.
Support Options VisualDSP++ Linker and Utilities Manual This manual provides information on the linking process and describes the syntax for the linker’s command language—a scripting language that the linker reads from the linker description file (.ldf). The manual leads you through using the linker and archiver to produce processor programs. It also provides reference information on file formats and utility software. The manual also describes how overlays and advanced .
Available Support The manual begins by examining where loading/splitting fits in the typical program development activities. It discusses boot modes, boot streams, and second stage kernels. This manual contains the details you need to know about booting each particular subfamily of SHARC processors. VisualDSP++ Example Programs The current release of VisualDSP++ contains several SHARC built-in examples that users may find useful.
Support Options Hardware Tools Documentation Each hardware tool available from Analog Devices includes documentation in electronic format. Typically this documentation includes a short description of switch and jumper settings, a bill of materials, and schematics.
Available Support This manual provides information on the EZ-KIT Lite from a programmer’s perspective and provides a memory map of the board. SHARC EZ-Board Evaluation System Manual This manual provides instructions for using the hardware and installing the software on your PC. This manual also provides guidelines for running your own code on the SHARC EZ-Board. In addition, the manual describes the operation and configuration of the evaluation board’s components.
Support Options Best of all, VisualDSP++ Help provides a single access point to just about every processor hardware and tools document produced by Analog Devices. The search engine in Help enables you to find information quickly.
Available Support Use EngineerZone to connect with other DSP developers who face similar design challenges. You can also use this open forum to share knowledge and collaborate with the ADI support team and your peers. Visit http://ez.analog.com to sign up. Social Networking Web Sites You can now follow Analog Devices SHARC development on Twitter and LinkedIn. To access: • Twitter: http://twitter.com/ADISHARC • LinkedIn: Network with the LinkedIn group, Analog Devices SHARC: http://www.linkedin.
I INDEX A ADSP-21262 EZ-KIT Lite evaluation board, 2-33 ADSP-2126x SHARC processor specifications, 1-9 ADSP-21364 EZ-KIT Lite evaluation board, 2-30 ADSP-21369 EZ-KIT Lite evaluation board, 2-27 ADSP-2136x/ADSP-2137x SHARC processor specifications, 1-10 ADSP-21371 EZ-KIT Lite evaluation board, 2-24 ADSP-21375 EZ-KIT Lite evaluation board, 2-21 ADSP-21469 EZ-Board, 2-43 ADSP-21469 EZ-KIT Lite evaluation board, 2-18, 2-19 ADSP-2146x SHARC processor specifications, 1-11 ADSP-21479 EZ-Board, 2-40 ADSP-21479 E
Index D data sheets, 3-7 Debug Agent Board, 2-46 debugging targets, JTAG connection to EZ-KIT Lite board, 2-6 decoders, 2-12 desktop evaluation boards, list of, 2-10 documentation data sheets, 3-7 EZ-KIT Lite evaluation systems, 3-13, 3-14 for SHARC processors, 3-5 hardware reference manuals, 3-6 hardware tools, 3-13 programming reference manuals, 3-6 SHARC EZ-Extender Manual, 3-14 SHARC EZ-KIT Lite Evaluation System Manual, 3-13, 3-14 VisualDSP++ Assembler and Preprocessor Manual, 3-10 VisualDSP++ C/C++ C
Index Help system described, 3-14 for VisualDSP++, 2-9 High-performance USB 2.0 JTAG emulator (HPUSB), 2-55 HP-USB (high-performance USB JTAG emulator), 2-55 M I O IBIS (I/O buffer information specification) defined, 3-8 models, 3-8 IDDE (integrated software development and debugging environment), 2-2 instruction set reference, 3-6 integrated software development and debugging environment. See IDDE I/O buffer information specification. See IBIS online Help.
Index R T real-time operating system.
Index W Web site, Analog Devices, 3-1 Windows operating systems, supporting VisualDSP, 2-4 workshops, 3-4 Getting Started With SHARC Processors I-5
Index I-6 Getting Started With SHARC Processors
