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MOS Quad SPST Switches

Data Sheet

ADG441/ADG442/ADG444

Rev. B Document Feedback

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FEATURES

44 V supply maximum ratings

to V

analog signal range

Low on resistance (<70 Ω)

Low ΔR

(9 Ω max)

Low R

match (3 Ω max)

Low power dissipation

Fast switching times

< 110 ns

OFF

< 60 ns

Low leakage currents (3 nA max)

Low charge injection (6 pC max)

Break-before-make switching action

Latch-up proof A grade

Plug-in upgrade for DG201A/ADG201A, DG202A/ADG202A,

DG211/ADG211A

Plug-in replacement for DG441/DG442/DG444

APPLICATIONS

Audio and video switching

Automatic test equipment

Precision data acquisition

Battery-powered systems

Sample-and-hold systems

Communication systems

GENERAL DESCRIPTION

The ADG441, ADG442, and ADG444 are monolithic CMOS

devices that comprise of four independently selectable switches.

They are designed on an enhanced LC

MOS process that

provides low power dissipation yet gives high switching speed

and low on resistance.

The on resistance profile is very flat over the full analog input

range, which ensures good linearity and low distortion when

switching audio signals. High switching speed also makes the

parts suitable for video signal switching. CMOS construction

ensures ultralow power dissipation, making the parts ideally

suited for portable and battery-powered instruments. The

ADG441, ADG442, and ADG444 contain four independent

SPST switches. Each switch of the ADG441 and ADG444 turns

on when a logic low is applied to the appropriate control input.

The ADG442 switches are turned on with logic high on the

appropriate control input. The ADG441 and ADG444 switches

differ in that the ADG444 requires a 5 V logic power supply

that is applied to the V

pin. The ADG441 and ADG442 do not

have a V

pin, the logic power supply is generated internally by

an on-chip voltage generator.

FUNCTIONAL BLOCK DIAGRAM

Figure 1.

Each switch conducts equally well in both directions when ON

and has an input signal range that extends to the power

supplies. In the OFF condition, signal levels up to the supplies

are blocked. All switches exhibit break-before-make switching

action for use in multiplexer applications. Inherent in the

design is the low charge injection for minimum transients when

switching the digital inputs.

PRODUCT HIGHLIGHTS

1. Extended signal range. The ADG441A/ADG442A/

ADG444A are fabricated on an enhanced LC

MOS,

trench-isolated process, giving an increased signal range

that extends to the supply rails.

2. Low power dissipation.

3. Low R

4. Trench isolation guards against latch-up for A grade parts.

A dielectric trench separates the P and N channel

transistors thereby preventing latch-up even under severe

overvoltage conditions.

5. Break-before-make switching. This prevents channel

shorting when the switches are configured as a multiplexer.

6. Single-supply operation. For applications where the analog

signal is unipolar, the ADG441/ADG442/ADG444 can be

operated from a single-rail power supply. The parts are

fully specified with a single 12 V power supply.

05233-001

IN1

IN2

IN3

IN4

IN1

IN2

IN3

IN4

ADG441

ADG444

ADG442

SWITCHES SHOWN FOR A LOGIC 1 INPUT

Summary of content (16 pages)

PAGE 1
LC2MOS Quad SPST Switches ADG441/ADG442/ADG444 Data Sheet FUNCTIONAL BLOCK DIAGRAM 44 V supply maximum ratings VSS to VDD analog signal range Low on resistance (<70 Ω) Low ΔRON (9 Ω max) Low RON match (3 Ω max) Low power dissipation Fast switching times tON < 110 ns tOFF < 60 ns Low leakage currents (3 nA max) Low charge injection (6 pC max) Break-before-make switching action Latch-up proof A grade Plug-in upgrade for DG201A/ADG201A, DG202A/ADG202A, DG211/ADG211A Plug-in replacement for DG441/DG442/DG444
PAGE 2
ADG441/ADG442/ADG444 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications ....................................................................................... 1 ESD Caution...................................................................................5 General Description ............................................
PAGE 3
Data Sheet ADG441/ADG442/ADG444 SPECIFICATIONS DUAL SUPPLY1 VDD = +15 V ± 10%, VSS = −15 V ± 10%, VL = +5 V ± 10% (ADG444), GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range RON +25°C B Version −40°C to +85°C VSS to VDD 40 70 ∆RON RON Match 85 4 9 1 3 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) ±0.01 ±3 Drain OFF Leakage ID (OFF) ±0.5 ±0.01 ±0.5 ±0.08 ±0.
PAGE 4
ADG441/ADG442/ADG444 Data Sheet SINGLE SUPPLY1 VDD = +12 V ± 10%, VSS = 0 V, VL = +5 V ± 10% (ADG444), GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range RON +25°C 0 to VDD 70 110 ∆RON RON Match LEAKAGE CURRENT Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) ±0.01 ±0.5 ±0.01 ±0.5 ±0.08 ±0.
PAGE 5
Data Sheet ADG441/ADG442/ADG444 ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise noted. Table 3.
PAGE 6
ADG441/ADG442/ADG444 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 16 IN2 D1 2 15 D2 S1 3 ADG441 ADG442 VSS 4 14 S2 13 VDD GND 5 12 NC TOP VIEW S4 6 (Not to Scale) 11 S3 10 D3 9 05233-002 D4 7 IN4 8 IN3 NC = NO CONNECT Figure 2. ADG441/ADG442 (DIP/SOIC) Table 5. ADG441/ADG442 Pin Function Descriptions Pin No. 1, 8, 9, 16 2, 7, 10, 15 3, 6, 11, 14 4 Mnemonic IN1 to IN4 D1 to D4 S1 to S4 VSS 5 12 13 GND NC VDD Description Logic Control Input. Drain Terminal.
PAGE 7
Data Sheet ADG441/ADG442/ADG444 TYPICAL PERFORMANCE CHARACTERISTICS 100 0.02 VDD = +5V VSS = –5V TA = 25°C LEAKAGE CURRENT (nA) RON (Ω) 80 VDD = +12V VSS = –12V 60 VDD = +10V VSS = –10V 40 VDD = +15V VSS = –15V TA = 25°C ID (OFF) 0.01 0 ID (ON) IS (OFF) –0.01 –10 –5 0 VD (VS) (V) 5 10 15 –0.02 –15 05233-005 20 –15 Figure 4. RON as a Function of VD (VS): Dual Supply 170 0 VS (VD) (V) 5 10 15 Figure 7.
PAGE 8
ADG441/ADG442/ADG444 120 VDD = 12V VSS = 0V TA = 25°C VIN = 8V 0.005 100 ID (ON) tON IS (OFF) t (ns) LEAKAGE CURRENT (nA) 0.010 Data Sheet 0 ID (OFF) –0.005 80 60 2 4 6 VS, VD (V) 8 10 12 40 ±10 Figure 10. Leakage Currents as a Function of VS (VD) 160 30 ±20 VIN = 8V 140 20 120 tON 10 VDD = +15V VSS = –15V t (ns) 0 100 VDD = 12V VSS = 0V –10 80 60 –20 tOFF 40 –30 –12 –9 –6 –3 0 VS (V) 3 6 9 12 15 05233-012 CHARGE INJECTION (pC) ±18 Figure 12.
PAGE 9
Data Sheet ADG441/ADG442/ADG444 TEST CIRCUITS IDS ID (OFF) VS D ID (ON) S A VD 05233-015 S D VS RON = V1/IDS Figure 14. On Resistance 0.1F +5V VD VDD VL VIN S Figure 16. On Leakage 3V 0.1F 50% 50% 50% 50% ADG441/ADG444 D RL 1k VS VOUT CL 35pF 3V VIN ADG442 IN GND 90% VSS 90% VOUT tON tOFF 05233-018 0.1F –15V Figure 17. Switching Times +15V +5V VDD VL 3V S D VOUT CL 1nF VS IN VIN VOUT VOUT GND VSS QINJ = CL × VOUT 05233-019 RS –15V Figure 18.
PAGE 10
ADG441/ADG442/ADG444 +15V +5V VDD VSS S 0.1F 0.1F D VS VS IN VOUT VSS 0.1F –15V VDD VSS 0.1F 50 D VIN1 VIN2 NC RL 50 GND VSS 0.1F 05233-021 VIN +5V S VOUT RL 50 GND +15V –15V CHANNEL-TO-CHANNEL CROSSTALK = 20 × LOG | VS/VOUT | Figure 19. Off Isolation Figure 20. Channel-to-Channel Crosstalk Rev. B | Page 10 of 16 05233-022 0.
PAGE 11
Data Sheet ADG441/ADG442/ADG444 TERMINOLOGY RON Ohmic resistance between D and S. RON Match Difference between the RON of any two channels. IS (OFF) Source leakage current with the switch OFF. ID (OFF) Drain leakage current with the switch OFF. ID, IS (ON) Channel leakage current with the switch ON. VD (VS) Analog voltage on Terminals D, S. CS (OFF) OFF switch source capacitance. CD (OFF) OFF switch drain capacitance. tON Delay between applying the digital control input and the output switching on.
PAGE 12
ADG441/ADG442/ADG444 Data Sheet TRENCH ISOLATION NMOS PMOS P-WELL N-WELL LOCO In junction isolation, the N and P wells of the PMOS and NMOS transistors form a diode that is reverse-biased under normal operation. However, during overvoltage conditions, this diode becomes forward-biased. A silicon-controlled rectifier (SCR) type circuit is formed by the two transistors causing a significant amplification of the current which, in turn, leads to latch-up.
PAGE 13
Data Sheet ADG441/ADG442/ADG444 OUTLINE DIMENSIONS 0.775 0.755 0.735 9 16 PIN 1 INDICATOR 0.280 0.250 0.240 1 8 TOP VIEW 0.210 MAX SIDE VIEW 0.325 0.310 0.300 0.195 0.130 0.115 0.015 MIN 0.150 0.130 0.115 0.022 0.018 0.015 0.070 0.045 0.060 0.039 0.055 0.030 0.015 GAUGE PLANE END VIEW SEATING PLANE 0.021 0.016 0.011 0.012 0.010 0.008 0.430 MAX 03-07-2014-D 0.100 BSC COMPLIANT TO JEDEC STANDARDS MS-001-BB Figure 22.
PAGE 14
ADG441/ADG442/ADG444 Data Sheet ORDERING GUIDE Model1, 2 ADG441BNZ ADG441BR ADG441BR-REEL ADG441BRZ ADG441BRZ-REEL ADG441ABCHIPS ADG441ABR-REEL ADG441ABRZ-REEL ADG442BNZ ADG442BRZ ADG442BRZ-REEL ADG444BNZ ADG444BR ADG444BR-REEL ADG444BRZ ADG444BRZ-REEL 1 2 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package
PAGE 15
Data Sheet ADG441/ADG442/ADG444 NOTES Rev.
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ADG441/ADG442/ADG444 Data Sheet NOTES ©1994–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00396-0-5/14(B) Rev.